On Mon, 2026-03-02 at 09:06 +0530, Arun R Murthy wrote: > In ALPM init, the DPCD register ALPM_CAPABILITIES are to be read. > This > read has to happen after the DPCD init. > > Signed-off-by: Arun R Murthy <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 613559d11133..e60802b0b8c9 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -6948,8 +6948,6 @@ static bool intel_edp_init_connector(struct > intel_dp *intel_dp, > */ > intel_hpd_enable_detection(encoder); > > - intel_alpm_init(intel_dp); > - > /* Cache DPCD and EDID for edp. */ > has_dpcd = intel_edp_init_dpcd(intel_dp, connector); > > @@ -6961,6 +6959,8 @@ static bool intel_edp_init_connector(struct > intel_dp *intel_dp, > goto out_vdd_off; > } > > + intel_alpm_init(intel_dp);
This will cause problems to PSR/Panel Replay. intel_psr_init_dpcd is relying on ALPM dpcd init is done first. BR, Jouni Högander > + > /* > * VBT and straps are liars. Also check HPD as that seems > * to be the most reliable piece of information available.
