> Subject: [PATCH 18/19] drm/i915/lt_phy: Remove LT PHY specific state > verification > > Remove LT PHY specific state verification as DPLL framework has state > verification check. > > Signed-off-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_lt_phy.c | 39 ------------------- > drivers/gpu/drm/i915/display/intel_lt_phy.h | 2 - > .../drm/i915/display/intel_modeset_verify.c | 1 - > 3 files changed, 42 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c > b/drivers/gpu/drm/i915/display/intel_lt_phy.c > index 052cbbd36397..1dc53918a054 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c > @@ -2270,45 +2270,6 @@ bool intel_lt_phy_pll_readout_hw_state(struct > intel_encoder *encoder, > return true; > } > > -void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > -{ > - struct intel_display *display = to_intel_display(state); > - struct intel_digital_port *dig_port; > - const struct intel_crtc_state *new_crtc_state = > - intel_atomic_get_new_crtc_state(state, crtc); > - struct intel_encoder *encoder; > - struct intel_lt_phy_pll_state pll_hw_state = {}; > - const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state- > >dpll_hw_state.ltpll; > - > - if (DISPLAY_VER(display) < 35) > - return; > - > - if (!new_crtc_state->hw.active) > - return; > - > - /* intel_get_crtc_new_encoder() only works for modeset/fastset > commits */ > - if (!intel_crtc_needs_modeset(new_crtc_state) && > - !intel_crtc_needs_fastset(new_crtc_state)) > - return; > - > - encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > - intel_lt_phy_pll_readout_hw_state(encoder, &pll_hw_state); > - > - dig_port = enc_to_dig_port(encoder); > - if (intel_tc_port_in_tbt_alt_mode(dig_port)) > - return; > - > - INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] != > pll_sw_state->config[0], > - "[CRTC:%d:%s] mismatch in LT PHY PLL > CONFIG 0: (expected 0x%04x, found 0x%04x)", > - crtc->base.base.id, crtc->base.name, > - pll_sw_state->config[0], > pll_hw_state.config[0]); > - INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] != > pll_sw_state->config[2], > - "[CRTC:%d:%s] mismatch in LT PHY PLL > CONFIG 2: (expected 0x%04x, found 0x%04x)", > - crtc->base.base.id, crtc->base.name, > - pll_sw_state->config[2], > pll_hw_state.config[2]); > -} > - > void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, > struct intel_dpll *pll, > const struct intel_dpll_hw_state *dpll_hw_state) > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h > b/drivers/gpu/drm/i915/display/intel_lt_phy.h > index 1c2ec438cd10..8b98997b3107 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h > @@ -41,8 +41,6 @@ bool intel_lt_phy_tbt_pll_readout_hw_state(struct > intel_display *display, > struct intel_dpll_hw_state > *hw_state); bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder > *encoder, > struct intel_lt_phy_pll_state > *pll_state); - > void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, > - struct intel_crtc *crtc); > int > intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state, > u32 frequency_khz); > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c > b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > index 12a00121c274..2ec17c2bfe0f 100644 > --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c > +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > @@ -246,7 +246,6 @@ void intel_modeset_verify_crtc(struct > intel_atomic_state *state, > verify_crtc_state(state, crtc); > intel_dpll_state_verify(state, crtc); > intel_mpllb_state_verify(state, crtc); > - intel_lt_phy_pll_state_verify(state, crtc); > }
So I should have noticed this earlier in patch 11 itself but the state verification for LT PHY wont work with DPLL framework verification. The reason being unlike previous PHY's we had values will not be preserved in the shadow registers. Do if there is an internal PHY shutdown which is again controlled by DMC with feature like PSR etc these values will be lost and read as 0's. Only values that are retained are config[0/2] rest are erased. So a memcmp of full hw state will throw a State Mismatch. You'll need to rethink the get_hw_state approach or omit this hooke and let intel_lt_phy_pll_state_verify take care of it for now Regards, Suraj Kandpal > > void intel_modeset_verify_disabled(struct intel_atomic_state *state) > -- > 2.43.0
