On Tue, 03 Feb 2026, Manasi Navare <[email protected]> wrote: > Thanks Jausheem for the pipe mismatch logs without your patch. And so with > your patch now since you set new_crtc_state to old_crtc_state, this goes > away and it meets the fastset right? > > @Jani Nikula <[email protected]> : Did you want to take a look at any > other logs? The above logs are stripped out from kernel logging without his > patch and with his patch it becomes a fastset as expected. > Let us know if there is any other feedback to improve the design for > enabling seamless boot?
I think it would be better to file an issue at fdo gitlab and attach the full logs with debugs as described at [1]. The short snippets don't really give a good picture of what's going on. The initial commit should be about 1) reading out the hw state to sw state, 2) some sanitization steps where there might be discrepancies between read out state and what would be the computed state, 3) ensuring everything matches in the initial commit so fastset is possible. In the below log snippet, everything's being turned off. That's not just about some individual values differing and requiring a full modeset. It's hard to say what's going on. But simply copying the state over is not the way to go. BR, Jani. [1] https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html > > Regards > Manasi > > On Tue, Jan 27, 2026 at 12:05 AM Juasheem Sultan <[email protected]> > wrote: > >> > I'd like to see logs of what the differences are. >> >> Here's the logs from the pipe_config_compare without my patch: >> <6>[ 43.743023] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.enable (expected yes, found no) >> <6>[ 43.763730] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.active (expected yes, found no) >> <6>[ 43.789093] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in cpu_transcoder (expected 0, found -1) >> <6>[ 43.814759] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met ihw.enablen lane_count (expected 2, found 0) >> <6>[ 43.835751] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in dp_m_n (expected tu 64 data 8007832/8388608 link >> 333659/524288, found tu 0, data 0/0 link 0/0) >> <6>[ 43.835753] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in output_types (expected 0x00000100, found 0x00000000) >> <6>[ 43.835754] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in framestart_delay (expected 1, found 0) >> <6>[ 43.856743] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_hdisplay (expected 1920, found 0) >> <6>[ 43.888602] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_htotal (expected 2080, found 0) >> <6>[ 43.888603] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_hblank_start (expected 1920, found >> 0) >> <6>[ 43.888604] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_hblank_end (expected 2080, found 0) >> <6>[ 43.888604] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_hsync_start (expected 1966, found >> 0) >> <6>[ 43.888605] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_hsync_end (expected 1996, found 0) >> <6>[ 43.888605] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_vdisplay (expected 1200, found 0) >> <6>[ 43.888606] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_vsync_start (expected 1210, found >> 0) >> <6>[ 43.888607] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_vsync_end (expected 1216, found 0) >> <6>[ 43.911732] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_vtotal (expected 1236, found 0) >> <6>[ 43.911733] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_vblank_end (expected 1236, found 0) >> <6>[ 43.932520] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_hdisplay (expected 1920, found >> 0) >> <6>[ 43.960305] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_htotal (expected 2080, found 0) >> <6>[ 43.960306] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_hblank_start (expected 1920, >> found 0) >> <6>[ 43.960306] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_hblank_end (expected 2080, >> found 0) >> <6>[ 43.960307] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_hsync_start (expected 1966, >> found 0) >> <6>[ 43.960307] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_hsync_end (expected 1996, >> found 0) >> <6>[ 43.960308] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_vdisplay (expected 1200, found >> 0) >> <6>[ 43.960308] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_vsync_start (expected 1210, >> found 0) >> <6>[ 43.960309] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_vsync_end (expected 1216, >> found 0) >> <6>[ 43.960310] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_vtotal (expected 1236, found 0) >> <6>[ 43.960310] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_vblank_end (expected 1236, >> found 0) >> <6>[ 43.988392] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in pixel_multiplier (expected 1, found 0) >> <6>[ 43.988393] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.flags (2) (expected 2, found 0) >> <6>[ 44.016086] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.flags (8) (expected 8, found 0) >> <6>[ 44.016087] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in enhanced_framing (expected yes, found no) >> <6>[ 44.016088] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in pipe_bpp (expected 24, found 0) >> <6>[ 44.044074] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.pipe_mode.crtc_clock (expected 154647, found 0) >> <6>[ 44.044075] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in hw.adjusted_mode.crtc_clock (expected 154647, found >> 0) >> <6>[ 44.044075] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in port_clock (expected 243000, found 0) >> <6>[ 44.044077] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met in vrr.guardband (expected 35, found 0) >> <6>[ 44.065890] xe 0000:00:02.0: [drm] [CRTC:88:pipe A] fastset >> requirement not met, forcing full modeset >> >> On Thu, Jan 22, 2026 at 7:29 AM Jani Nikula <[email protected]> >> wrote: >> >>> On Wed, 21 Jan 2026, Juasheem Sultan <[email protected]> wrote: >>> > When attempting the initial commit, there is a mismatch between >>> > the new crtc_state and the old crtc_state. This causes us to fail the >>> > pipe_config comparison and force a modeset. In the case where we are >>> > inheriting an initialized state, we can sync the new and the old state >>> > to pass the comparison and allow us to do a fastset and achieve an >>> > uninterrupted handoff to userspace. >>> > >>> > Signed-off-by: Juasheem Sultan <[email protected]> >>> > --- >>> > drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++++ >>> > 1 file changed, 19 insertions(+) >>> > >>> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c >>> b/drivers/gpu/drm/i915/display/intel_display.c >>> > index 0d527cf22866..6eef4bd2e251 100644 >>> > --- a/drivers/gpu/drm/i915/display/intel_display.c >>> > +++ b/drivers/gpu/drm/i915/display/intel_display.c >>> > @@ -5736,6 +5736,25 @@ static void intel_crtc_check_fastset(const >>> struct intel_crtc_state *old_crtc_sta >>> > if (old_crtc_state->vrr.in_range != new_crtc_state->vrr.in_range) >>> > new_crtc_state->update_lrr = false; >>> > >>> > + /* Copying crtc state if inheriting an old state for commit */ >>> > + if (old_crtc_state->inherited) { >>> > + new_crtc_state->hw = old_crtc_state->hw; >>> > + >>> > + new_crtc_state->port_clock = old_crtc_state->port_clock; >>> > + new_crtc_state->pipe_bpp = old_crtc_state->pipe_bpp; >>> > + new_crtc_state->cpu_transcoder = >>> old_crtc_state->cpu_transcoder; >>> > + new_crtc_state->lane_count = old_crtc_state->lane_count; >>> > + new_crtc_state->output_types = >>> old_crtc_state->output_types; >>> > + new_crtc_state->dp_m_n = old_crtc_state->dp_m_n; >>> > + new_crtc_state->framestart_delay = >>> old_crtc_state->framestart_delay; >>> > + new_crtc_state->pixel_multiplier = >>> old_crtc_state->pixel_multiplier; >>> > + new_crtc_state->pixel_rate = old_crtc_state->pixel_rate; >>> > + new_crtc_state->enhanced_framing = >>> old_crtc_state->enhanced_framing; >>> > + new_crtc_state->dpll_hw_state = >>> old_crtc_state->dpll_hw_state; >>> > + new_crtc_state->intel_dpll = old_crtc_state->intel_dpll; >>> > + new_crtc_state->vrr.guardband = >>> old_crtc_state->vrr.guardband; >>> >>> I'd like to see logs of what the differences are. >>> >>> BR, >>> Jani. >>> >>> > + } >>> > + >>> > if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, >>> true)) { >>> > drm_dbg_kms(display->drm, "[CRTC:%d:%s] fastset >>> requirement not met, forcing full modeset\n", >>> > crtc->base.base.id, crtc->base.name); >>> >>> -- >>> Jani Nikula, Intel >>> >> -- Jani Nikula, Intel
