On 2025-09-25 11:55 a.m., Belgaumkar, Vinay wrote:
On 9/15/2025 5:16 PM, Zhanjun Dong wrote:
GuC IRQ and tasklet handler receive just single G2H message, and let
other
messages to be received from next tasklet. During this chained tasklet
process, if reset process started, communication will be disabled.
Skip warning for this condition.
Fixes: 65dd4ed0f4e1 ("drm/i915/guc: Don't receive all G2H messages in
irq handler")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14834
Signed-off-by: Zhanjun Dong <zhanjun.d...@intel.com>
---
History:
v3: Add skip on interrupt disabled case
v2: Update subject text, removed fixup
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/
drm/i915/gt/uc/intel_guc_ct.c
index 3e7e5badcc2b..78308ff00d68 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -1325,9 +1325,15 @@ static int ct_receive(struct intel_guc_ct *ct)
static void ct_try_receive_message(struct intel_guc_ct *ct)
{
+ struct intel_guc *guc = ct_to_guc(ct);
int ret;
- if (GEM_WARN_ON(!ct->enabled))
+ if (!ct->enabled) {
+ GEM_WARN_ON(!guc_to_gt(guc)->uc.reset_in_progress);
+ return;
+ }
+
+ if (!guc->interrupts.enabled)
Is it possible there are some messages in the CT buffer even though
interrupts are disabled?
Thanks,
Vinay.
Yes, that is exactly the issue condition, more than 1 messages in CTB,
tasklet process single message a time and trigger next tasklet to
continue, during this chained process, it is possible that interrupt
becomes disabled, like gt reset process started after a timeout event.
Regards,
Zhanjun Dong
return;
ret = ct_receive(ct);
