> -----Original Message-----
> From: Kandpal, Suraj <[email protected]>
> Sent: Tuesday, June 17, 2025 10:37 AM
> To: Bhadane, Dnyaneshwar <[email protected]>; intel-
> [email protected]
> Subject: RE: [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port A and B
>
>
>
> > -----Original Message-----
> > From: Bhadane, Dnyaneshwar <[email protected]>
> > Sent: Monday, June 16, 2025 9:31 PM
> > To: Kandpal, Suraj <[email protected]>;
> > [email protected]
> > Subject: RE: [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port A
> > and B
> >
> >
> >
> > > -----Original Message-----
> > > From: Kandpal, Suraj <[email protected]>
> > > Sent: Monday, June 16, 2025 2:09 PM
> > > To: Bhadane, Dnyaneshwar <[email protected]>; intel-
> > > [email protected]
> > > Cc: Bhadane, Dnyaneshwar <[email protected]>
> > > Subject: RE: [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port
> > > A and B
> > >
> > >
> > >
> > > > -----Original Message-----
> > > > From: Intel-xe <[email protected]> On Behalf
> > > > Of Dnyaneshwar Bhadane
> > > > Sent: Saturday, June 14, 2025 1:02 AM
> > > > To: [email protected]
> > > > Cc: Bhadane, Dnyaneshwar <[email protected]>
> > > > Subject: [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port A
> > > > and B
> > > >
> > > > WCL added a c10 phy connected to port B. PTL code is currently
> > > > restricting c10 to phy_a only.
> > > >
> > > > PTL doesn't have a PHY connected to PORT B; as such,there will
> > > > never be a case where PTL uses PHY B.
> > > > WCL uses PORT A and B with the C10 PHY.Reusing the condition for
> > > > WCL and extending it for PORT B should not cause any issues for PTL.
> > > >
> > > > -v2: Reuse and extend PTL condition for WCL (Matt)
> > >
> > > Add the bspec reference here
> > >
> > > >
> > > > Signed-off-by: Dnyaneshwar Bhadane
> > <[email protected]>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 +++++++-
> > > > 1 file changed, 7 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > index 83c8df9dbc0c..ed8e640b96b0 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > @@ -39,7 +39,13 @@ bool intel_encoder_is_c10phy(struct
> > > > intel_encoder
> > > > *encoder)
> > > > struct intel_display *display = to_intel_display(encoder);
> > > > enum phy phy = intel_encoder_to_phy(encoder);
> > > >
> > > > - if (display->platform.pantherlake && phy == PHY_A)
> > > > + /* PTL doesn't have a PHY connected to PORT B; as such,
> > > > + * there will never be a case where PTL uses PHY B.
> > > > + * WCL uses PORT A and B with the C10 PHY.
> > > > + * Reusing the condition for WCL and extending it for PORT B
> > > > + * should not cause any issues for PTL.
> > > > + */
> > > > + if (display->platform.pantherlake && phy < PHY_C)
> > >
> > > Just because PTL does not have PHY connected to Port B does not
> > > mean the code wont come here it seemed like this is the check That
> > > made sure we go to c10 PHY and with this it will go for c10 phy when
> > > port becomes port B
> >
> > This would be case ever. No,
> > PTL don't have PHY connected with Port B so this would never be a case ever.
> > Specs: 72571
> >
> > As you could see similar condition is also extended for lunar lake
> > which has the don't have PHY connected with port B,
> >
> > Dnyaneshwar,
> >
> >
> > >
> > > Regards,
> > > Suraj Kandpal
> > > > return true;
> > > >
> > > > if ((display->platform.lunarlake ||
> > > > display->platform.meteorlake)
>
> Got if that is the case you can merge the condition with this check since it
> basically does the same thing.
> I would get it if you are holding out to see if the wcl platform check comes
> in but
> in that case I would say Wait till that comes in and merge that change.
> Add the Bspec reference in patch before merging
Thank you. Since it has been extended for WCL, it would be good to keep the
conditions separate for the time being to make explanation easier.
Later may be year later, we can combine them into a single condition as you
explained above.
Dnyaneshwar,
>
> With the above fixed
>
> Reviewed-by: Suraj Kandpal <[email protected]>
>
> > > > && phy < PHY_C)
> > > > --
> > > > 2.34.1
