Some display register files include i915_reg_defs.h, some don't include anything. Prefer intel_display_reg_defs.h in display.
Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/display/intel_cmtg_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_combo_phy_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h | 2 ++ drivers/gpu/drm/i915/display/intel_dmc_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_gmbus_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_hti_regs.h | 2 +- drivers/gpu/drm/i915/display/intel_sbi_regs.h | 2 +- 8 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h index 668e41d65e86..945a35578284 100644 --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h @@ -6,7 +6,7 @@ #ifndef __INTEL_CMTG_REGS_H__ #define __INTEL_CMTG_REGS_H__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" #define CMTG_CLK_SEL _MMIO(0x46160) #define CMTG_CLK_SEL_A_MASK REG_GENMASK(31, 29) diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h index ee41acdccf4e..3694f95376c2 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h +++ b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h @@ -6,7 +6,7 @@ #ifndef __INTEL_COMBO_PHY_REGS__ #define __INTEL_COMBO_PHY_REGS__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" #define _ICL_COMBOPHY_A 0x162000 #define _ICL_COMBOPHY_B 0x6C000 diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h index 580a43be195e..77eae1d845f7 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h @@ -6,8 +6,8 @@ #ifndef __INTEL_CX0_PHY_REGS_H__ #define __INTEL_CX0_PHY_REGS_H__ -#include "i915_reg_defs.h" #include "intel_display_limits.h" +#include "intel_display_reg_defs.h" /* DDI Buffer Control */ #define _DDI_CLK_VALFREQ_A 0x64030 diff --git a/drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h b/drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h index 56085b32956d..3d8fa667cc73 100644 --- a/drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h @@ -8,6 +8,8 @@ #include <linux/types.h> +#include "intel_display_reg_defs.h" + struct intel_dkl_phy_reg { u32 reg:24; u32 bank_idx:4; diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h index d8e715677454..6f406315dd65 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h @@ -6,7 +6,7 @@ #ifndef __INTEL_DMC_REGS_H__ #define __INTEL_DMC_REGS_H__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" enum dmc_event_id { DMC_EVENT_TRUE = 0x0, diff --git a/drivers/gpu/drm/i915/display/intel_gmbus_regs.h b/drivers/gpu/drm/i915/display/intel_gmbus_regs.h index 59bad1dda6d6..ab750562566b 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus_regs.h +++ b/drivers/gpu/drm/i915/display/intel_gmbus_regs.h @@ -6,7 +6,7 @@ #ifndef __INTEL_GMBUS_REGS_H__ #define __INTEL_GMBUS_REGS_H__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" #define __GMBUS_MMIO_BASE(__display) ((__display)->gmbus.mmio_base) diff --git a/drivers/gpu/drm/i915/display/intel_hti_regs.h b/drivers/gpu/drm/i915/display/intel_hti_regs.h index e206f2837fc8..39c046bd351c 100644 --- a/drivers/gpu/drm/i915/display/intel_hti_regs.h +++ b/drivers/gpu/drm/i915/display/intel_hti_regs.h @@ -6,7 +6,7 @@ #ifndef __INTEL_HTI_REGS_H__ #define __INTEL_HTI_REGS_H__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" #define HDPORT_STATE _MMIO(0x45050) #define HDPORT_DPLL_USED_MASK REG_GENMASK(15, 12) diff --git a/drivers/gpu/drm/i915/display/intel_sbi_regs.h b/drivers/gpu/drm/i915/display/intel_sbi_regs.h index 6fd37574b805..ec76652de02d 100644 --- a/drivers/gpu/drm/i915/display/intel_sbi_regs.h +++ b/drivers/gpu/drm/i915/display/intel_sbi_regs.h @@ -4,7 +4,7 @@ #ifndef __INTEL_SBI_REGS_H__ #define __INTEL_SBI_REGS_H__ -#include "i915_reg_defs.h" +#include "intel_display_reg_defs.h" /* * Sideband Interface (SBI) is programmed indirectly, via SBI_ADDR, which -- 2.39.5
