Add a function to get the (const) pointer to struct dram_info, and use that to obtain the pointer instead of poking at i915->dram_info directly.
Clean up a couple of local variables while at it. Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/display/intel_bw.c | 5 +++-- .../gpu/drm/i915/display/intel_display_power.c | 9 ++++----- drivers/gpu/drm/i915/display/skl_watermark.c | 15 ++++++++------- drivers/gpu/drm/i915/soc/intel_dram.c | 7 +++++++ drivers/gpu/drm/i915/soc/intel_dram.h | 3 +++ 5 files changed, 25 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 6c537635b120..97aef729f7d4 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -5,6 +5,7 @@ #include <drm/drm_atomic_state_helper.h> +#include "soc/intel_dram.h" #include "i915_drv.h" #include "i915_reg.h" #include "i915_utils.h" @@ -13,9 +14,9 @@ #include "intel_cdclk.h" #include "intel_display_core.h" #include "intel_display_types.h" -#include "skl_watermark.h" #include "intel_mchbar_regs.h" #include "intel_pcode.h" +#include "skl_watermark.h" /* Parameters for Qclk Geyserville (QGV) */ struct intel_qgv_point { @@ -763,7 +764,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display, void intel_bw_init_hw(struct intel_display *display) { - const struct dram_info *dram_info = &to_i915(display->drm)->dram_info; + const struct dram_info *dram_info = intel_dram_info(display->drm); if (!HAS_DISPLAY(display)) return; diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index d7f5d3dbb8a1..8e8c3a2f401b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -5,6 +5,7 @@ #include <linux/string_helpers.h> +#include "soc/intel_dram.h" #include "i915_drv.h" #include "i915_irq.h" #include "i915_reg.h" @@ -1604,9 +1605,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = { static void tgl_bw_buddy_init(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - enum intel_dram_type type = dev_priv->dram_info.type; - u8 num_channels = dev_priv->dram_info.num_channels; + const struct dram_info *dram_info = intel_dram_info(display->drm); const struct buddy_page_mask *table; unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask; int config, i; @@ -1623,8 +1622,8 @@ static void tgl_bw_buddy_init(struct intel_display *display) table = tgl_buddy_page_masks; for (config = 0; table[config].page_mask != 0; config++) - if (table[config].num_channels == num_channels && - table[config].type == type) + if (table[config].num_channels == dram_info->num_channels && + table[config].type == dram_info->type) break; if (table[config].page_mask == 0) { diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 8080f777910a..f5600f4b7772 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -7,6 +7,7 @@ #include <drm/drm_blend.h> +#include "soc/intel_dram.h" #include "i915_drv.h" #include "i915_reg.h" #include "i9xx_wm.h" @@ -3184,8 +3185,6 @@ void skl_watermark_ipc_update(struct intel_display *display) static bool skl_watermark_ipc_can_enable(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); - /* Display WA #0477 WaDisableIPC: skl */ if (display->platform.skylake) return false; @@ -3193,8 +3192,11 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display) /* Display WA #1141: SKL:all KBL:all CFL */ if (display->platform.kabylake || display->platform.coffeelake || - display->platform.cometlake) - return i915->dram_info.symmetric_memory; + display->platform.cometlake) { + const struct dram_info *dram_info = intel_dram_info(display->drm); + + return dram_info->symmetric_memory; + } return true; } @@ -3213,8 +3215,7 @@ static void adjust_wm_latency(struct intel_display *display, u16 wm[], int num_levels, int read_latency) { - struct drm_i915_private *i915 = to_i915(display->drm); - bool wm_lv_0_adjust_needed = i915->dram_info.wm_lv_0_adjust_needed; + const struct dram_info *dram_info = intel_dram_info(display->drm); int i, level; /* @@ -3250,7 +3251,7 @@ adjust_wm_latency(struct intel_display *display, * any underrun. If not able to get Dimm info assume 16GB dimm * to avoid any underrun. */ - if (wm_lv_0_adjust_needed) + if (dram_info->wm_lv_0_adjust_needed) wm[0] += 1; } diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c index 9f806ce0eb9e..76c225fd6c70 100644 --- a/drivers/gpu/drm/i915/soc/intel_dram.c +++ b/drivers/gpu/drm/i915/soc/intel_dram.c @@ -750,6 +750,13 @@ void intel_dram_detect(struct drm_i915_private *i915) str_yes_no(dram_info->wm_lv_0_adjust_needed)); } +const struct dram_info *intel_dram_info(struct drm_device *drm) +{ + struct drm_i915_private *i915 = to_i915(drm); + + return &i915->dram_info; +} + static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap) { static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 }; diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/soc/intel_dram.h index a10136eda674..17a20cd2c6d5 100644 --- a/drivers/gpu/drm/i915/soc/intel_dram.h +++ b/drivers/gpu/drm/i915/soc/intel_dram.h @@ -7,9 +7,12 @@ #define __INTEL_DRAM_H__ struct drm_i915_private; +struct drm_device; +struct dram_info; void intel_dram_edram_detect(struct drm_i915_private *i915); void intel_dram_detect(struct drm_i915_private *i915); unsigned int i9xx_fsb_freq(struct drm_i915_private *i915); +const struct dram_info *intel_dram_info(struct drm_device *drm); #endif /* __INTEL_DRAM_H__ */ -- 2.39.5
