On Tue, Oct 15, 2024 at 11:40:08AM +0530, Suraj Kandpal wrote:
> DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
> Increase pipe and plane max width and height to reflect this
> increase in resolution.
> 
> Signed-off-by: Arun R Murthy <arun.r.mur...@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       |  5 ++++-
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 ++++++++++++-
>  2 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e1f6255e918b..37bac53f996e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8432,7 +8432,10 @@ intel_mode_valid_max_plane_size(struct 
> drm_i915_private *dev_priv,
>        * plane so let's not advertize modes that are
>        * too big for that.
>        */
> -     if (DISPLAY_VER(dev_priv) >= 11) {
> +     if (DISPLAY_VER(dev_priv) >= 30) {
> +             plane_width_max = 6144 * num_joined_pipes;
> +             plane_height_max = 4096;
> +     } else if (DISPLAY_VER(dev_priv) >= 11) {
>               plane_width_max = 5120 * num_joined_pipes;
>               plane_height_max = 4320;
>       } else {
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 9557b08ca2e2..4dec9e693218 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -431,6 +431,13 @@ static int icl_plane_min_width(const struct 
> drm_framebuffer *fb,
>       }
>  }
>  
> +static int xe3_plane_max_width(const struct drm_framebuffer *fb,
> +                            int color_plane,
> +                            unsigned int rotation)
> +{
> +     return 6144;

The Chroma upsampler is still limited to 4k, just as on past platforms.
It looks like you fix this in a later patch, but we might as well add
the check in this patch so that we have the right values right from the
start.


Matt


> +}
> +
>  static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
>                                  int color_plane,
>                                  unsigned int rotation)
> @@ -2573,7 +2580,11 @@ skl_universal_plane_create(struct drm_i915_private 
> *dev_priv,
>  
>       intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
>  
> -     if (DISPLAY_VER(dev_priv) >= 11) {
> +     if (DISPLAY_VER(dev_priv) >= 30) {
> +             plane->max_width = xe3_plane_max_width;
> +             plane->max_height = icl_plane_max_height;
> +             plane->min_cdclk = icl_plane_min_cdclk;
> +     } else if (DISPLAY_VER(dev_priv) >= 11) {
>               plane->min_width = icl_plane_min_width;
>               if (icl_is_hdr_plane(dev_priv, plane_id))
>                       plane->max_width = icl_hdr_plane_max_width;
> -- 
> 2.47.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

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