RE: [PATCH] drm/i915/bmg: Read display register timeout

Tue, 06 Aug 2024 21:07:41 -0700 


> -----Original Message-----
> From: Kandpal, Suraj <[email protected]>
> Sent: Monday, July 29, 2024 2:39 PM
> To: Golani, Mitulkumar Ajitkumar <[email protected]>;
> [email protected]
> Cc: [email protected]
> Subject: RE: [PATCH] drm/i915/bmg: Read display register timeout
> 
> 
> 
> > -----Original Message-----
> > From: Intel-gfx <[email protected]> On Behalf Of
> > Mitul Golani
> > Sent: Thursday, July 25, 2024 6:28 PM
> > To: [email protected]
> > Cc: [email protected]
> > Subject: [PATCH] drm/i915/bmg: Read display register timeout
> >
> > Log the address of the register that caused the timeout interrupt by
> > reading RMTIMEOUTREG_CAPTURE
> >
> > Signed-off-by: Mitul Golani <[email protected]>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_irq.c | 7 ++++++-
> >  drivers/gpu/drm/i915/i915_reg.h                  | 2 ++
> >  2 files changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > index 5219ba295c74..8e22f7ac3db0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > @@ -905,6 +905,11 @@ gen8_de_misc_irq_handler(struct drm_i915_private
> > *dev_priv, u32 iir)
> >
> >                     intel_pmdemand_irq_handler(dev_priv);
> >                     found = true;
> > +           } else if (iir & GEN8_DE_RM_TIMEOUT) {
> > +                   u32 val = intel_uncore_read(&dev_priv->uncore,
> > +
> RMTIMEOUTREG_CAPTURE);
> > +                   drm_warn(&dev_priv->drm, "Register Access Timeout
> =
> > 0x%x\n", val);
> > +                   found = true;
> >             }
> >     } else if (iir & GEN8_DE_MISC_GSE) {
> >             intel_opregion_asle_intr(dev_priv);
> > @@ -1710,7 +1715,7 @@ void gen8_de_irq_postinstall(struct
> > drm_i915_private *dev_priv)
> >
> >     if (DISPLAY_VER(dev_priv) >= 14) {
> >             de_misc_masked |= XELPDP_PMDEMAND_RSPTOUT_ERR |
> > -                             XELPDP_PMDEMAND_RSP;
> > +                             XELPDP_PMDEMAND_RSP |
> > GEN8_DE_RM_TIMEOUT;
> 
> Do you only want to log it for display_ver > = 14,  I would expect it to be 
> logged
> Even for gen 8 so maybe this isn't the right place to OR it.

Previous targets have dependency on RMTIMEOUTREG_CAPTURE availability also this 
logging is expected to be enabled from Display Version 14 or greater. 

> 
> >     } else if (DISPLAY_VER(dev_priv) >= 11) {
> >             enum port port;
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 0e3d79227e3c..858ce8a5d929
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -2396,6 +2396,7 @@
> >
> >  /* Display Internal Timeout Register */
> >  #define RM_TIMEOUT         _MMIO(0x42060)
> > +#define RMTIMEOUTREG_CAPTURE       _MMIO(0x420E0)
> 
> Maybe RM_TIMEOUT_REG_CAPTURE seems cleaner.

I will add to new version.

Thanks,
Mitul
> 
> Regards,
> Suraj Kandpal
> >  #define  MMIO_TIMEOUT_US(us)       ((us) << 0)
> >
> >  /* interrupts */
> > @@ -2574,6 +2575,7 @@
> >  #define GEN8_DE_MISC_IMR _MMIO(0x44464)  #define GEN8_DE_MISC_IIR
> > _MMIO(0x44468)  #define GEN8_DE_MISC_IER _MMIO(0x4446c)
> > +#define  GEN8_DE_RM_TIMEOUT                REG_BIT(29)
> >  #define  XELPDP_PMDEMAND_RSPTOUT_ERR       REG_BIT(27)
> >  #define  GEN8_DE_MISC_GSE          REG_BIT(27)
> >  #define  GEN8_DE_EDP_PSR           REG_BIT(19)
> > --
> > 2.45.2























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