Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CHV_CANVAS register macro.
Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a6d7928fbe37..241121b0b3ff 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2110,7 +2110,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state, if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe), CHV_BLEND_LEGACY); - intel_de_write(dev_priv, CHV_CANVAS(pipe), 0); + intel_de_write(dev_priv, CHV_CANVAS(dev_priv, pipe), 0); } crtc->active = true; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ddfa77231426..8aa35bbb2e1b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2272,7 +2272,7 @@ #define CHV_CANVAS_BLUE_MASK REG_GENMASK(9, 0) #define CHV_BLEND(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A) -#define CHV_CANVAS(pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A) +#define CHV_CANVAS(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A) /* Display/Sprite base address macros */ #define DISP_BASEADDR_MASK (0xfffff000) -- 2.39.2
