== Series Details == Series: Correction to QGV related register addresses (rev2) URL : https://patchwork.freedesktop.org/series/115473/ State : warning
== Summary == Error: dim checkpatch failed fb0563a71e40 drm/i915/reg: fix QGV points register access offsets -:26: WARNING:LONG_LINE: line length of 107 exceeds 100 columns #26: FILE: drivers/gpu/drm/i915/i915_reg.h:7728: +#define MTL_MEM_SS_INFO_QGV_POINT_LOW(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + (point) * 2 * 0x4) -:32: WARNING:LONG_LINE: line length of 111 exceeds 100 columns #32: FILE: drivers/gpu/drm/i915/i915_reg.h:7733: +#define MTL_MEM_SS_INFO_QGV_POINT_HIGH(point) _MMIO(MTL_MEM_SS_INFO_QGV_POINT_OFFSET + 4 + (point) * 2 * 0x4) total: 0 errors, 2 warnings, 0 checks, 15 lines checked a0bdaca0de64 drm/i915/reg: use the correct register to access SAGV block time
