Hi Anshuman,
[...]
> > > > + * which really disables the PCIe power savings and leaves the
> > > > bridge to
> > D0
> > > > + * state.
> > > > + * Let's disable i915 rpm till we fix all known issue with
> > > > lmem access in
> > D3.
> > > > + */
> > > > + .has_runtime_pm = 0,
> > > > };
> > > >
> > > > static const struct intel_device_info adl_s_info = { @@ -1076,6
> > > > +1096,7 @@ static const struct intel_device_info dg2_info = {
> > > > XE_LPD_FEATURES,
> > > > .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) |
> > BIT(TRANSCODER_B) |
> > > > BIT(TRANSCODER_C) | BIT(TRANSCODER_D),
> > > > + .has_runtime_pm = 0,
> > >
> > > The FIXME msg can be smaller, but it also needs to be here.
> >
> > I actually like the comment, is very clear and helps understanding the
> > issue :)
> Shall I move the comment to commit log , and keep a smaller comment for both
> DG1 and DG2 ?
> With that I can address your comment and Rodrigo comment as well.
> Keeping such a big comment at two places will not make any sense.
OK for me!
Thanks!
Andi
