On Fri, Jun 17, 2022 at 10:59:48PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä <[email protected]> > > The stuff programmed into the wm/ddb registers of planes > on disabled pipes doesn't matter. So during readout just > leave our software state tracking for those zeroed. > > This should avoid us trying too hard to clean up after > whatever mess the VBIOS/GOP left in there. The actual > hardware state will get cleaned up if/when we enable > the pipe anyway. > > References: https://gitlab.freedesktop.org/drm/intel/-/issues/5711 > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Stanislav Lisovskiy <[email protected]> > --- > drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 174fab564d10..d083964d5470 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6560,7 +6560,10 @@ void skl_wm_get_hw_state(struct drm_i915_private > *dev_priv) > enum plane_id plane_id; > u8 slices; > > - skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); > + memset(&crtc_state->wm.skl.optimal, 0, > + sizeof(crtc_state->wm.skl.optimal)); > + if (crtc_state->hw.active) > + skl_pipe_wm_get_hw_state(crtc, > &crtc_state->wm.skl.optimal); > crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal; > > memset(&dbuf_state->ddb[pipe], 0, > sizeof(dbuf_state->ddb[pipe])); > @@ -6571,6 +6574,9 @@ void skl_wm_get_hw_state(struct drm_i915_private > *dev_priv) > struct skl_ddb_entry *ddb_y = > &crtc_state->wm.skl.plane_ddb_y[plane_id]; > > + if (!crtc_state->hw.active) > + continue; > + > skl_ddb_get_hw_plane_state(dev_priv, crtc->pipe, > plane_id, ddb, ddb_y); > > -- > 2.35.1 >
