Re: [Intel-gfx] [PATCH 1/5] drm/i915/dp: Add helper to check DSC1.2 for HDMI2.1 DFP

[Nautiyal, Ankit K]

On 8/23/2022 4:32 PM, Jani Nikula wrote:
On Mon, 22 Aug 2022, Ankit Nautiyal <ankit.k.nauti...@intel.com> wrote:
Add helper function to check if Downstream HDMI 2.1 sink supports
DSC1.2.
If we do this, are we going to add helpers for all the details in
display_info, when there's no conversions being done? I think the answer
should be "no".

i.e. why do we really need this?

Hmm well initially I was checking both the dsc_max_frl rate and dsc 
version, but dropped the dsc_max_frl rate check later.

(need another patch series to fix DSC parsing from HFVSDB: 
https://patchwork.freedesktop.org/series/107146/ )

In current form, this function does seem unnecessary,  I will drop this 
patch from the series.

Thanks & Regards,

Ankit


BR,
Jani.

Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
  drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++--
  1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 32292c0be2bd..fdf82373a22d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -118,6 +118,15 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
  static void intel_dp_unset_edid(struct intel_dp *intel_dp);
  static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 
dsc_max_bpc);
  
+static bool
+is_dfp_hdmi_sink_dsc_1_2(struct intel_dp *intel_dp)
+{
+       struct intel_connector *intel_connector = intel_dp->attached_connector;
+       struct drm_connector *connector = &intel_connector->base;
+
+       return connector->display_info.hdmi.dsc_cap.v_1p2;
+}
+
  /* Is link rate UHBR and thus 128b/132b? */
  bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state)
  {
@@ -2393,7 +2402,7 @@ static int intel_dp_hdmi_sink_max_frl(struct intel_dp 
*intel_dp)
        rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
        max_frl_rate = max_lanes * rate_per_lane;
  
-	if (connector->display_info.hdmi.dsc_cap.v_1p2) {
+       if (is_dfp_hdmi_sink_dsc_1_2(intel_dp)) {
                max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
                dsc_rate_per_lane = 
connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
                if (max_dsc_lanes && dsc_rate_per_lane)
@@ -2605,7 +2614,7 @@ intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
        if (!intel_connector)
                return;
        connector = &intel_connector->base;
-       hdmi_is_dsc_1_2 = connector->display_info.hdmi.dsc_cap.v_1p2;
+       hdmi_is_dsc_1_2 = is_dfp_hdmi_sink_dsc_1_2(intel_dp);
  
  	if (!drm_dp_pcon_enc_is_dsc_1_2(intel_dp->pcon_dsc_dpcd) ||
            !hdmi_is_dsc_1_2)