On Mon, Mar 28, 2022 at 07:10:25PM +0300, Vinod Govindapillai wrote: > DG2 has a constant bandwidth regardless of the number of planes > enabled. Handle the DG2 bw separately. > > cc: Ville Syrjälä <[email protected]> > cc: Stanislav Lisovskiy <[email protected]> > > Signed-off-by: Vinod Govindapillai <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_bw.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > b/drivers/gpu/drm/i915/display/intel_bw.c > index ac11ff19e47d..8955f9f8476a 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -1003,7 +1003,9 @@ int intel_bw_atomic_check(struct intel_atomic_state > *state) > for (i = 0; i < num_qgv_points; i++) { > unsigned int max_data_rate; > > - if (DISPLAY_VER(dev_priv) > 11) > + if (IS_DG2(dev_priv)) > + max_data_rate = dev_priv->max_bw[0].deratedbw[0];
Are you saying tgl_max_bw() doesn't actually work for dg2? > + else if (DISPLAY_VER(dev_priv) > 11) > max_data_rate = tgl_max_bw(dev_priv, num_active_planes, > i); > else > max_data_rate = icl_max_bw(dev_priv, num_active_planes, > i); > -- > 2.25.1 -- Ville Syrjälä Intel
