On Tue, Feb 15, 2022 at 06:58:17PM -0800, Vinay Belgaumkar wrote: > This will ensure correct values for Gen12+ platforms. > > Cc: Matt Roper <[email protected]> > Signed-off-by: Vinay Belgaumkar <[email protected]>
Reviewed-by: Matt Roper <[email protected]> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index 13b27b8ff74e..cf075e726699 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -6,6 +6,7 @@ > #include "i915_drv.h" > #include "intel_guc_slpc.h" > #include "gt/intel_gt.h" > +#include "gt/intel_rps.h" > > static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc) > { > @@ -574,10 +575,10 @@ static int slpc_use_fused_rp0(struct intel_guc_slpc > *slpc) > > static void slpc_get_rp_values(struct intel_guc_slpc *slpc) > { > + struct intel_rps *rps = &slpc_to_gt(slpc)->rps; > u32 rp_state_cap; > > - rp_state_cap = intel_uncore_read(slpc_to_gt(slpc)->uncore, > - GEN6_RP_STATE_CAP); > + rp_state_cap = intel_rps_read_state_cap(rps); > > slpc->rp0_freq = REG_FIELD_GET(RP0_CAP_MASK, rp_state_cap) * > GT_FREQUENCY_MULTIPLIER; > -- > 2.34.0 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795
