From: Ville Syrjälä <[email protected]> Check that pipe_src_{w,h} aren't zero. We can currently cause a div by zero due to the missing check, and the hardware wouldn't like it either.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/intel_display.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index fa02677..7f61cfb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4271,6 +4271,9 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, intel_is_dual_link_lvds(dev)) || pipe_config->double_wide) pipe_config->pipe_src_w &= ~1; + if (pipe_config->pipe_src_w == 0 || pipe_config->pipe_src_h == 0) + return -EINVAL; + ret = intel_check_mode(&crtc->base, adjusted_mode); if (ret) return ret; -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
