On Wed, 08 Sep 2021, Dave Airlie <[email protected]> wrote: > From: Dave Airlie <[email protected]> > > This provide a service from irq to display, so make it separate > --- > drivers/gpu/drm/i915/display/intel_hotplug.c | 4 ++-- > drivers/gpu/drm/i915/i915_drv.h | 9 ++++++++- > drivers/gpu/drm/i915/i915_irq.c | 14 +++++++------- > 3 files changed, 17 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c > b/drivers/gpu/drm/i915/display/intel_hotplug.c > index 47c85ac97c87..a06e1e1b33e1 100644 > --- a/drivers/gpu/drm/i915/display/intel_hotplug.c > +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c > @@ -215,8 +215,8 @@ intel_hpd_irq_storm_switch_to_polling(struct > drm_i915_private *dev_priv) > > static void intel_hpd_irq_setup(struct drm_i915_private *i915) > { > - if (i915->display_irqs_enabled && i915->display.hpd_irq_setup) > - i915->display.hpd_irq_setup(i915); > + if (i915->display_irqs_enabled && i915->irq_funcs.hpd_irq_setup) > + i915->irq_funcs.hpd_irq_setup(i915); > } > > static void intel_hpd_irq_storm_reenable_work(struct work_struct *work) > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index fbe92f248d05..ece23401cb46 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -384,6 +384,10 @@ struct drm_i915_display_cdclk_funcs { > u8 (*calc_voltage_level)(int cdclk); > }; > > +struct drm_i915_irq_funcs {
Here, I'm a bit divided with the naming, irqs being more of i915 core, even if serving display. I could go with intel_hotplug_funcs. *shrug*. Reviewed-by: Jani Nikula <[email protected]> > + void (*hpd_irq_setup)(struct drm_i915_private *dev_priv); > +}; > + > struct drm_i915_display_funcs { > /* Returns the active state of the crtc, and if the crtc is active, > * fills out the pipe-config with the hw state. */ > @@ -401,7 +405,7 @@ struct drm_i915_display_funcs { > > void (*fdi_link_train)(struct intel_crtc *crtc, > const struct intel_crtc_state *crtc_state); > - void (*hpd_irq_setup)(struct drm_i915_private *dev_priv); > + > /* clock updates for mode set */ > /* cursor updates */ > /* render clock increase/decrease */ > @@ -993,6 +997,9 @@ struct drm_i915_private { > /* pm display functions */ > struct drm_i915_wm_disp_funcs wm_disp; > > + /* irq display functions */ > + struct drm_i915_irq_funcs irq_funcs; > + > /* Display functions */ > struct drm_i915_display_funcs display; > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 0a1681384c84..f515a3a76a8e 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -4395,20 +4395,20 @@ void intel_irq_init(struct drm_i915_private *dev_priv) > > if (HAS_GMCH(dev_priv)) { > if (I915_HAS_HOTPLUG(dev_priv)) > - dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = i915_hpd_irq_setup; > } else { > if (HAS_PCH_DG1(dev_priv)) > - dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = dg1_hpd_irq_setup; > else if (DISPLAY_VER(dev_priv) >= 11) > - dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = gen11_hpd_irq_setup; > else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) > - dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = bxt_hpd_irq_setup; > else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) > - dev_priv->display.hpd_irq_setup = icp_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = icp_hpd_irq_setup; > else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT) > - dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = spt_hpd_irq_setup; > else > - dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup; > + dev_priv->irq_funcs.hpd_irq_setup = ilk_hpd_irq_setup; > } > } -- Jani Nikula, Intel Open Source Graphics Center
