> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of José > Roberto de Souza > Sent: Friday, July 16, 2021 6:12 PM > To: [email protected] > Subject: [Intel-gfx] [PATCH 1/4] drm/i915/display: Disable FBC when PSR2 is > enabled for xelpd platforms > > xelpd platforms also requires that FBC is disabled when PSR2 is enabled so > extending it. > > BSpec: 50422 > Cc: Gwan-gyeong Mun <[email protected]> > Signed-off-by: José Roberto de Souza <[email protected]>
Reviewed-by: Anusha Srivatsa <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c > b/drivers/gpu/drm/i915/display/intel_fbc.c > index 82effb64a3b9c..ddfc17e21668a 100644 > --- a/drivers/gpu/drm/i915/display/intel_fbc.c > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c > @@ -912,11 +912,11 @@ static bool intel_fbc_can_activate(struct intel_crtc > *crtc) > } > > /* > - * Tigerlake is not supporting FBC with PSR2. > + * Display 12+ is not supporting FBC with PSR2. > * Recommendation is to keep this combination disabled > * Bspec: 50422 HSD: 14010260002 > */ > - if (fbc->state_cache.psr2_active && IS_TIGERLAKE(dev_priv)) { > + if (fbc->state_cache.psr2_active && DISPLAY_VER(dev_priv) >= 12) { > fbc->no_fbc_reason = "not supported with PSR2"; > return false; > } > -- > 2.32.0 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
