On Tue, Jun 22, 2021 at 02:22:10PM -0700, Lucas De Marchi wrote:
> Since we are already loop through the levels to sanitize them, mark what
> is the real max_level so it can be used in subsequent loop. This makes
> it simpler to later add the adjsutement latency to "valid levels". No

Minor typo in "adjustment."

Reviewed-by: Matt Roper <[email protected]>

> change in behavior, just makes the code easier to follow.
> 
> Signed-off-by: Lucas De Marchi <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index be2931d54b95..6b6474d4f204 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2906,6 +2906,9 @@ static void intel_read_wm_latency(struct 
> drm_i915_private *dev_priv,
>                       if (wm[level] == 0) {
>                               for (i = level + 1; i <= max_level; i++)
>                                       wm[i] = 0;
> +
> +                             max_level = level - 1;
> +
>                               break;
>                       }
>               }
> @@ -2920,12 +2923,8 @@ static void intel_read_wm_latency(struct 
> drm_i915_private *dev_priv,
>               if (wm[0] == 0) {
>                       u8 adjust = DISPLAY_VER(dev_priv) >= 12 ? 3 : 2;
>  
> -                     wm[0] += adjust;
> -                     for (level = 1; level <= max_level; level++) {
> -                             if (wm[level] == 0)
> -                                     break;
> +                     for (level = 0; level <= max_level; level++)
>                               wm[level] += adjust;
> -                     }
>               }
>  
>               /*
> -- 
> 2.31.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to