On Wed, Aug 28, 2013 at 04:45:46PM -0300, Rodrigo Vivi wrote: > Batchbuffers constructed by userspace can conditionalise their URB > allocations through the use of the MI_SET_PREDICATE command. This > command can read the MI_PREDICATE_RESULT_2 register to see how many > slices are enabled on GT3, and by virtue of the result, scale their > memory allocations to fit enabled memory. > > Of course, this only works if the kernel sets the appropriate bit in the > register first. > > v2: Better commit subject and message by Chris Wilson. > > Cc: Chris Wilson <[email protected]> > Credits-by: Yejun Guo <[email protected]> > Signed-off-by: Rodrigo Vivi <[email protected]>
I would have written the I915_WRITE() differently but, Reviewed-by: Chris Wilson <[email protected]> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
