From: Ville Syrjälä <[email protected]> The current code attempts to protect the RMWs into global clock routing registers with a mutex, but forgets to do so in a few places. Let's remedy that.
Note that at the moment we serialize all modesets onto single wq, so this shouldn't actually matter. But maybe one day we wish to attempt parallel modesets again... Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 0cb20163fb1f..bd1eac282033 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1927,8 +1927,12 @@ static void cnl_ddi_disable_clock(struct intel_encoder *encoder) struct drm_i915_private *i915 = to_i915(encoder->base.dev); enum port port = encoder->port; + mutex_lock(&i915->dpll.lock); + intel_de_rmw(i915, DPCLKA_CFGCR0, 0, DPCLKA_CFGCR0_DDI_CLK_OFF(port)); + + mutex_unlock(&i915->dpll.lock); } static void skl_ddi_enable_clock(struct intel_encoder *encoder, @@ -1957,8 +1961,12 @@ static void skl_ddi_disable_clock(struct intel_encoder *encoder) struct drm_i915_private *i915 = to_i915(encoder->base.dev); enum port port = encoder->port; + mutex_lock(&i915->dpll.lock); + intel_de_rmw(i915, DPLL_CTRL2, 0, DPLL_CTRL2_DDI_CLK_OFF(port)); + + mutex_unlock(&i915->dpll.lock); } void hsw_ddi_enable_clock(struct intel_encoder *encoder, -- 2.26.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
