On Mon, Aug 19, 2013 at 05:18:47PM -0300, Paulo Zanoni wrote:
> 2013/8/19 Jesse Barnes <[email protected]>:
> > The existing code was trying different vswing and preemphasis settings
> > in the wrong place, and wasn't trying them enough.  So add a loop to
> > walk through them, properly disabling FDI TX and RX in between if a
> > failure is detected.
> >
> > v2: remove unneeded reg writes, add delays around bit lock checks (Jesse)
> > v3: fix TX and RX disable per spec (Paulo)
> >     fix delays per spec (Paulo)
> >     make RX symbol lock check match TX bit lock check (Paulo)
> >
> > Signed-off-by: Jesse Barnes <[email protected]>
> 
> Reviewed-by: Paulo Zanoni <[email protected]>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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