Read and debug log the eDP sink MSO configuration. Do not actually do
anything with the information yet besides logging.

v2: Rename intel_dp_mso_init -> intel_edp_mso_init

Cc: Nischal Varide <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 32 +++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 927a8aeae324..59fe86fe4e4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1438,6 +1438,7 @@ struct intel_dp {
        int max_link_lane_count;
        /* Max rate for the current link */
        int max_link_rate;
+       int mso_link_count;
        /* sink or branch descriptor */
        struct drm_dp_desc desc;
        struct drm_dp_aux aux;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 7b4dd55021dc..23f98e8dd7df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3512,6 +3512,36 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp 
*intel_dp)
        }
 }
 
+static void intel_edp_mso_init(struct intel_dp *intel_dp)
+{
+       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+       u8 mso;
+
+       if (intel_dp->edp_dpcd[0] < DP_EDP_14)
+               return;
+
+       if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES, 
&mso) != 1) {
+               drm_err(&i915->drm, "Failed to read MSO cap\n");
+               return;
+       }
+
+       /* Valid configurations are SST or MSO 2x1, 2x2, 4x1 */
+       mso &= DP_EDP_MSO_NUMBER_OF_LINKS_MASK;
+       if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) {
+               drm_err(&i915->drm, "Invalid MSO link count cap %u\n", mso);
+               mso = 0;
+       }
+
+       if (mso) {
+               drm_dbg_kms(&i915->drm, "Sink MSO %ux%u configuration\n",
+                           mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso);
+               drm_err(&i915->drm, "No source MSO support, disabling\n");
+               mso = 0;
+       }
+
+       intel_dp->mso_link_count = mso;
+}
+
 static bool
 intel_edp_init_dpcd(struct intel_dp *intel_dp)
 {
@@ -3595,6 +3625,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
         */
        intel_edp_init_source_oui(intel_dp, true);
 
+       intel_edp_mso_init(intel_dp);
+
        return true;
 }
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to