On Tue, 29 Dec 2020, Anshuman Gupta <[email protected]> wrote:
> On 2020-12-22 at 20:19:46 +0530, Jani Nikula wrote:
>> Add a locked version of intel_pps_vdd_off_sync_unlocked() that does
>> everything the callers expect it to.
>> 
>> Signed-off-by: Jani Nikula <[email protected]>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c  | 31 +++---------------------
>>  drivers/gpu/drm/i915/display/intel_pps.c | 17 ++++++++++++-
>>  drivers/gpu/drm/i915/display/intel_pps.h |  2 +-
>>  3 files changed, 20 insertions(+), 30 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index f2794cc4292a..1a34c9351c30 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -5809,17 +5809,8 @@ void intel_dp_encoder_flush_work(struct drm_encoder 
>> *encoder)
>>      struct intel_dp *intel_dp = &dig_port->dp;
>>  
>>      intel_dp_mst_encoder_cleanup(dig_port);
>> -    if (intel_dp_is_edp(intel_dp)) {
>> -            intel_wakeref_t wakeref;
>>  
>> -            cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
>> -            /*
>> -             * vdd might still be enabled do to the delayed vdd off.
>> -             * Make sure vdd is actually turned off here.
>> -             */
>> -            with_intel_pps_lock(intel_dp, wakeref)
>> -                    intel_pps_vdd_off_sync_unlocked(intel_dp);
>> -    }
>> +    intel_pps_vdd_off_sync(intel_dp);
>>  
>>      intel_dp_aux_fini(intel_dp);
>>  }
>> @@ -5835,18 +5826,8 @@ static void intel_dp_encoder_destroy(struct 
>> drm_encoder *encoder)
>>  void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
>>  {
>>      struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
>> -    intel_wakeref_t wakeref;
>> -
>> -    if (!intel_dp_is_edp(intel_dp))
>> -            return;
>>  
>> -    /*
>> -     * vdd might still be enabled do to the delayed vdd off.
>> -     * Make sure vdd is actually turned off here.
>> -     */
>> -    cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
>> -    with_intel_pps_lock(intel_dp, wakeref)
>> -            intel_pps_vdd_off_sync_unlocked(intel_dp);
>> +    intel_pps_vdd_off_sync(intel_dp);
>>  }
>>  
>>  void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder)
>> @@ -6700,13 +6681,7 @@ static bool intel_edp_init_connector(struct intel_dp 
>> *intel_dp,
>>      return true;
>>  
>>  out_vdd_off:
>> -    cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
>> -    /*
>> -     * vdd might still be enabled do to the delayed vdd off.
>> -     * Make sure vdd is actually turned off here.
>> -     */
>> -    with_intel_pps_lock(intel_dp, wakeref)
>> -            intel_pps_vdd_off_sync_unlocked(intel_dp);
>> +    intel_pps_vdd_off_sync(intel_dp);
>>  
>>      return false;
>>  }
>> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
>> b/drivers/gpu/drm/i915/display/intel_pps.c
>> index 01c9e69f4e3a..acd6d0092bc6 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pps.c
>> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
>> @@ -641,7 +641,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp)
>>                      dp_to_dig_port(intel_dp)->base.base.name);
>>  }
>>  
>> -void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
>> +static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
>>  {
>>      struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>>      struct intel_digital_port *dig_port =
>> @@ -682,6 +682,21 @@ void intel_pps_vdd_off_sync_unlocked(struct intel_dp 
>> *intel_dp)
>>                              fetch_and_zero(&intel_dp->vdd_wakeref));
>>  }
>>  
>> +void intel_pps_vdd_off_sync(struct intel_dp *intel_dp)
>> +{
>> +    intel_wakeref_t wakeref;
>> +    if (!intel_dp_is_edp(intel_dp))
>> +            return;
>> +
>> +    cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
>> +    /*
>> +     * vdd might still be enabled do to the delayed vdd off.
>       I belive there is a typo here "do -> due"

I just copy-pasted this over, but fixed in v2.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center
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