Quoting Matthew Auld (2020-11-27 12:04:37) > In igt_ppgtt_sanity_check we should also exercise the non-contiguous > option for LMEM, since this will give us slightly different sg layouts > and alignment. > > Signed-off-by: Matthew Auld <[email protected]> Reviewed-by: Chris Wilson <[email protected]> -Chris _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
- [Intel-gfx] [RFC PATCH 000/162] DG1 + LMEM enabling Matthew Auld
- [Intel-gfx] [RFC PATCH 001/162] drm/i915/selftest: also ... Matthew Auld
- Re: [Intel-gfx] [RFC PATCH 001/162] drm/i915/selftes... Chris Wilson
- [Intel-gfx] [RFC PATCH 002/162] drm/i915/selftest: asser... Matthew Auld
- [Intel-gfx] [RFC PATCH 004/162] drm/i915/gt: Move move c... Matthew Auld
- [Intel-gfx] [RFC PATCH 006/162] drm/i915: split gen8+ fl... Matthew Auld
- [Intel-gfx] [RFC PATCH 003/162] drm/i915/selftest: handl... Matthew Auld
- [Intel-gfx] [RFC PATCH 005/162] drm/i915/gt: Rename lrc.... Matthew Auld
- [Intel-gfx] [RFC PATCH 007/162] drm/i915: split wa_bb co... Matthew Auld
- [Intel-gfx] [RFC PATCH 008/162] HAX drm/i915: Work aroun... Matthew Auld
