On Mon, Nov 2, 2020 at 01:56PM, Lee Shawn C wrote:
>After boot into kernel. Driver configured ddc pin mapping based on predefined
>table in parse_ddi_port(). Now driver configure rkl ddc pin mapping depends on
>icp_ddc_pin_map[]. Then this table will give incorrect gmbus port number to
>cause HDMI can't work.
>
>Refer to commit d0a89527d06 ("drm/i915/rkl: Add DDC pin mapping").
>Create two ddc pin table for rkl TGP and CMP pch. Then HDMI can works properly
>on rkl.
>
>v2: update patch based on latest dinq branch.
>v3: update ddc table for RKL+TGP sku.
> RKL+CNP sku will load cnp_ddc_pin_map[] setting.
Hi Matt, may i have your comment about this patch v3? Thanks!
Best regards,
Shawn
>
>Cc: Matt Roper <[email protected]>
>Cc: Aditya Swarup <[email protected]>
>Cc: Anusha Srivatsa <[email protected]>
>Cc: Jani Nikula <[email protected]>
>Cc: Cooper Chiou <[email protected]>
>Cc: Khaled Almahallawy <[email protected]>
>Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2577
>Signed-off-by: Lee Shawn C <[email protected]>
>---
> drivers/gpu/drm/i915/display/intel_bios.c | 16 ++++++++++++++--
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 2 ++
> 2 files changed, 16 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
>b/drivers/gpu/drm/i915/display/intel_bios.c
>index 4cc949b228f2..4de991bafd10 100644
>--- a/drivers/gpu/drm/i915/display/intel_bios.c
>+++ b/drivers/gpu/drm/i915/display/intel_bios.c
>@@ -1623,6 +1623,13 @@ static const u8 icp_ddc_pin_map[] = {
> [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, };
>
>+static const u8 rkl_pch_tgp_ddc_pin_map[] = {
>+ [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
>+ [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
>+ [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
>+ [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, };
>+
> static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) {
> const u8 *ddc_pin_map;
>@@ -1631,8 +1638,13 @@ static u8 map_ddc_pin(struct drm_i915_private
>*dev_priv, u8 vbt_pin)
> if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
> return vbt_pin;
> } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
>- ddc_pin_map = icp_ddc_pin_map;
>- n_entries = ARRAY_SIZE(icp_ddc_pin_map);
>+ if (IS_ROCKETLAKE(dev_priv)) {
>+ ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
>+ n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
>+ } else {
>+ ddc_pin_map = icp_ddc_pin_map;
>+ n_entries = ARRAY_SIZE(icp_ddc_pin_map);
>+ }
> } else if (HAS_PCH_CNP(dev_priv)) {
> ddc_pin_map = cnp_ddc_pin_map;
> n_entries = ARRAY_SIZE(cnp_ddc_pin_map); diff --git
> a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>index 49b4b5fca941..187ec573de59 100644
>--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
>@@ -319,6 +319,8 @@ enum vbt_gmbus_ddi {
> ICL_DDC_BUS_DDI_A = 0x1,
> ICL_DDC_BUS_DDI_B,
> TGL_DDC_BUS_DDI_C,
>+ RKL_DDC_BUS_DDI_D = 0x3,
>+ RKL_DDC_BUS_DDI_E,
> ICL_DDC_BUS_PORT_1 = 0x4,
> ICL_DDC_BUS_PORT_2,
> ICL_DDC_BUS_PORT_3,
>--
>2.17.1
>
>
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx