On Mon, 19 Oct 2020, Anshuman Gupta <[email protected]> wrote: > Let's define Maximum MST content streams up to four > generically which can be supported by modern display > controllers. > > Cc: Sean Paul <[email protected]> > Cc: Ramalingam C <[email protected]> > Signed-off-by: Anshuman Gupta <[email protected]>
Hey drm-misc maintainers, I'd like to get an ack to merge this via drm-intel as part of [1]. Thanks, Jani. [1] http://lore.kernel.org/r/[email protected] > --- > include/drm/drm_hdcp.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h > index fe58dbb46962..ac22c246542a 100644 > --- a/include/drm/drm_hdcp.h > +++ b/include/drm/drm_hdcp.h > @@ -101,11 +101,11 @@ > > /* Following Macros take a byte at a time for bit(s) masking */ > /* > - * TODO: This has to be changed for DP MST, as multiple stream on > - * same port is possible. > - * For HDCP2.2 on HDMI and DP SST this value is always 1. > + * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual > + * H/W MST streams capacity. > + * This required to be moved out to platform specific header. > */ > -#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1 > +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 4 > #define HDCP_2_2_TXCAP_MASK_LEN 2 > #define HDCP_2_2_RXCAPS_LEN 3 > #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
