On Tue, 2020-06-30 at 17:28 +0300, Ville Syrjälä wrote: > On Mon, Jun 29, 2020 at 02:20:58PM -0700, José Roberto de Souza wrote: > > This fix some possible corruptions. > > > > BSpec: 52755 > > BSpec: 52890 > > Signed-off-by: José Roberto de Souza <[email protected]> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > > drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- > > 2 files changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index 284af0c6439c..797e036fa695 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -4170,6 +4170,9 @@ enum { > > #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) > > #define CGPSF_CLKGATE_DIS (1 << 3) > > > > +#define SLICE_UNIT_LEVEL_CLOCK_GATING_CTL _MMIO(0x94D8) > > +#define GS_UNIT_CLOCK_GATING_DIS REG_BIT(24) > > + > > /* > > * Display engine regs > > */ > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > b/drivers/gpu/drm/i915/intel_pm.c > > index 2a32d6230795..86408173c435 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -7113,7 +7113,7 @@ static void tgl_init_clock_gating(struct > > drm_i915_private *dev_priv) > > I915_WRITE(POWERGATE_ENABLE, > > I915_READ(POWERGATE_ENABLE) | vd_pg_enable); > > > > - /* Wa_1409825376:tgl (pre-prod)*/ > > + /* Wa_1409825376:tgl (pre-prod) */ > > if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0)) > > I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) | > > TGL_VRH_GATING_DIS); > > @@ -7121,6 +7121,12 @@ static void tgl_init_clock_gating(struct > > drm_i915_private *dev_priv) > > /* Wa_14011059788:tgl */ > > intel_uncore_rmw(&dev_priv->uncore, GEN10_DFR_RATIO_EN_AND_CHICKEN, > > 0, DFR_DISABLE); > > + > > + /* Wa_18011464164:tgl */ > > + if (IS_TGL_REVID(dev_priv, TGL_REVID_B0, TGL_REVID_B0)) > > + intel_uncore_rmw(&dev_priv->uncore, > > + SLICE_UNIT_LEVEL_CLOCK_GATING_CTL, 0, > > + GS_UNIT_CLOCK_GATING_DIS); > > This looks like a gt w/a, so shouldn't be here preobably. We also have > a very similarly named register already at 0x94d4, so the register > name probably needs some work too.
We register in the same class as this one being set in clock_gating functions and as this one have "CustomGTIIs_ContextSaved: true" we don't need to worry about reprogram it after a reset.About the name you are right, renaming to SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8 as BSpec adds the offset to the name as there is a bunch of SLICE_UNIT_LEVEL_CLKGATE_CTL registers. > > > } > > > > static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) > > -- > > 2.27.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > [email protected] > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
