This fix some possible corruptions. v2: Renamed SLICE_UNIT_LEVEL_CLOCK_GATING_CTL to SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8
BSpec: 52755 BSpec: 52890 Cc: Ville Syrjälä <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9d6536afc94b..76bc70d214b6 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4174,6 +4174,9 @@ enum { #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) #define CGPSF_CLKGATE_DIS (1 << 3) +#define SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8 _MMIO(0x94D8) +#define GS_UNIT_CLOCK_GATING_DIS REG_BIT(24) + /* * Display engine regs */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2a32d6230795..80293e3e48ad 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7113,7 +7113,7 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv) I915_WRITE(POWERGATE_ENABLE, I915_READ(POWERGATE_ENABLE) | vd_pg_enable); - /* Wa_1409825376:tgl (pre-prod)*/ + /* Wa_1409825376:tgl (pre-prod) */ if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0)) I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) | TGL_VRH_GATING_DIS); @@ -7121,6 +7121,12 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv) /* Wa_14011059788:tgl */ intel_uncore_rmw(&dev_priv->uncore, GEN10_DFR_RATIO_EN_AND_CHICKEN, 0, DFR_DISABLE); + + /* Wa_18011464164:tgl */ + if (IS_TGL_REVID(dev_priv, TGL_REVID_B0, TGL_REVID_B0)) + intel_uncore_rmw(&dev_priv->uncore, + SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8, 0, + GS_UNIT_CLOCK_GATING_DIS); } static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) -- 2.27.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
