On Fri, Jul 12, 2013 at 02:19:40PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <[email protected]>
> 
> We currently don't support HDMI clock bending nor use SSC for DP or
> HDMI on Haswell, so the only case where we need CLKOUT_DP is for VGA.
> 
> Signed-off-by: Paulo Zanoni <[email protected]>

Just an aside: One of the many plans on my todo is to move the refclk
updates into the global_modeset_resources callback and only enable the
refclocks we actually need for the given configuration. Entirely different
patch series though.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c | 38 
> ++++++++++++++++++++++++++++++++----
>  1 file changed, 34 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 5f3b636..059c9a8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5305,6 +5305,36 @@ static void lpt_enable_clkout_dp(struct drm_device 
> *dev, bool with_spread,
>       mutex_unlock(&dev_priv->dpio_lock);
>  }
>  
> +/* Sequence to disable CLKOUT_DP */
> +static void lpt_disable_clkout_dp(struct drm_device *dev)
> +{
> +     struct drm_i915_private *dev_priv = dev->dev_private;
> +     uint32_t tmp;
> +
> +     mutex_lock(&dev_priv->dpio_lock);
> +
> +     if (IS_ULT(dev_priv->dev)) {
> +             tmp = intel_sbi_read(dev_priv, SBI_GEN0, SBI_ICLK);
> +             tmp &= ~SBI_GEN0_ENABLE;
> +             intel_sbi_write(dev_priv, SBI_GEN0, tmp, SBI_ICLK);
> +     } else {
> +             tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
> +             tmp &= ~SBI_DBUFF0_ENABLE;
> +             intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK);
> +     }
> +
> +     tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
> +     if (!(tmp & SBI_SSCCTL_PATHALT)) {
> +             tmp |= SBI_SSCCTL_PATHALT;
> +             intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
> +             udelay(32);
> +     }
> +     tmp |= SBI_SSCCTL_DISABLE;
> +     intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
> +
> +     mutex_unlock(&dev_priv->dpio_lock);
> +}
> +
>  static void lpt_init_pch_refclk(struct drm_device *dev)
>  {
>       struct drm_mode_config *mode_config = &dev->mode_config;
> @@ -5319,10 +5349,10 @@ static void lpt_init_pch_refclk(struct drm_device 
> *dev)
>               }
>       }
>  
> -     if (!has_vga)
> -             return;
> -
> -     lpt_enable_clkout_dp(dev, true, true);
> +     if (has_vga)
> +             lpt_enable_clkout_dp(dev, true, true);
> +     else
> +             lpt_disable_clkout_dp(dev);
>  }
>  
>  /*
> -- 
> 1.8.1.2
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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