Chris Wilson <[email protected]> writes: > We only use sentinel requests for "preempt-to-idle" passes, so assert > that they are the only request in a new submission. > > Signed-off-by: Chris Wilson <[email protected]>
>From other thread, Reviewed-by: Mika Kuoppala <[email protected]> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 15d56cd3937e..b9b3f78f1324 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1448,6 +1448,7 @@ assert_pending_valid(const struct > intel_engine_execlists *execlists, > { > struct i915_request * const *port, *rq; > struct intel_context *ce = NULL; > + bool sentinel = false; > > trace_ports(execlists, msg, execlists->pending); > > @@ -1481,6 +1482,26 @@ assert_pending_valid(const struct > intel_engine_execlists *execlists, > } > ce = rq->context; > > + /* > + * Sentinels are supposed to be lonely so they flush the > + * current exection off the HW. Check that they are the > + * only request in the pending submission. > + */ > + if (sentinel) { > + GEM_TRACE_ERR("context:%llx after sentinel in > pending[%zd]\n", > + ce->timeline->fence_context, > + port - execlists->pending); > + return false; > + } > + > + sentinel = i915_request_has_sentinel(rq); > + if (sentinel && port != execlists->pending) { > + GEM_TRACE_ERR("sentinel context:%llx not in prime > position[%zd]\n", > + ce->timeline->fence_context, > + port - execlists->pending); > + return false; > + } > + > /* Hold tightly onto the lock to prevent concurrent retires! */ > if (!spin_trylock_irqsave(&rq->lock, flags)) > continue; > -- > 2.25.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
