On Tue, Feb 18, 2020 at 03:44:49PM -0800, Rafael Antognolli wrote:
> On Tue, Feb 18, 2020 at 02:47:10PM -0500, Matt Atwood wrote:
> > Disable Push Constant buffer addition for A0, which can cause FIFO
> > underruns.
> >
> > Fix a minor white space issue while we're here.
> >
> > Bspec: 52890
> > Cc: Rafael Antognolli <[email protected]>
> > Signed-off-by: Matt Atwood <[email protected]>
> > ---
> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 ++++++++++
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > 2 files changed, 13 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > index 887e0dc701f7..9bbd28aa9bde 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > @@ -580,6 +580,7 @@ static void icl_ctx_workarounds_init(struct
> > intel_engine_cs *engine,
> > static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
> > struct i915_wa_list *wal)
> > {
> > + struct drm_i915_private *i915 = engine->i915;
> > u32 val;
> >
> > /* Wa_1409142259:tgl */
> > @@ -590,6 +591,7 @@ static void tgl_ctx_workarounds_init(struct
> > intel_engine_cs *engine,
> > val = intel_uncore_read(engine->uncore, FF_MODE2);
> > val &= ~FF_MODE2_TDS_TIMER_MASK;
> > val |= FF_MODE2_TDS_TIMER_128;
> > +
> > /*
> > * FIXME: FF_MODE2 register is not readable till TGL B0. We can
> > * enable verification of WA from the later steppings, which enables
> > @@ -598,6 +600,14 @@ static void tgl_ctx_workarounds_init(struct
> > intel_engine_cs *engine,
> > wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
> > IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
> > FF_MODE2_TDS_TIMER_MASK);
> > +
> > + /* Wa_1409085225:tgl
> > + *
> > + * Push Constant Buffer can case FIFO underruns on A0
> > + */
> > + if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0))
>
> Is this really only applicable to A stepping?
Hmmm... it looks like there is another workaround that's almost the
same: 14010229206 <-- this one seems to be permanent.
The one you implemented is indeed only A stepping. I'm not sure which
one is right, though.
> > + WA_SET_BIT_MASKED(GEN9_ROW_CHICKEN4,
> > + GEN12_DISABLE_TDL_PUSH);
> > }
> >
> > static void
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index b09c1d6dc0aa..a75a27ed63ce 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -9153,6 +9153,9 @@ enum {
> > #define PUSH_CONSTANT_DEREF_DISABLE (1 << 8)
> > #define GEN11_TDL_CLOCK_GATING_FIX_DISABLE (1 << 1)
> >
> > +#define GEN9_ROW_CHICKEN4 _MMIO(0x48c)
>
> s/0x48c/0xe48c/ ?
>
> > +#define GEN12_DISABLE_TDL_PUSH (1 << 9)
> > +
> > #define HSW_ROW_CHICKEN3 _MMIO(0xe49c)
> > #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6)
> >
> > --
> > 2.21.1
> >
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
