On Wed, Jun 05, 2013 at 01:34:22PM +0200, Daniel Vetter wrote:
> Just move the lowfreq_avail logic out of the register writing as a
> prep step for the next patch, which will coalesce all the pch pll
> enabling into one spot.
>
> Signed-off-by: Daniel Vetter <[email protected]>
> ---
> drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index ecf0b1e..fc1b5f7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5686,7 +5686,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc
> *crtc,
> if (encoder->pre_pll_enable)
> encoder->pre_pll_enable(encoder);
>
> - intel_crtc->lowfreq_avail = false;
> + if (is_lvds && has_reduced_clock && i915_powersave)
> + intel_crtc->lowfreq_avail = true;
is_lvds doesn't seem necessary as ironlake_compute_clocks() won't set
has_reduced_clock to true if !is_lvds. Doesn't hurt either.
> + else
> + intel_crtc->lowfreq_avail = false;
>
> if (intel_crtc->config.has_pch_encoder) {
> pll = intel_crtc_to_shared_dpll(intel_crtc);
> @@ -5704,12 +5707,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc
> *crtc,
> */
> I915_WRITE(PCH_DPLL(pll->id), dpll);
>
> - if (is_lvds && has_reduced_clock && i915_powersave) {
> + if (has_reduced_clock)
> I915_WRITE(PCH_FP1(pll->id), fp2);
Hum this is not quite the same condition? i915_powersave could be false
and we don't want to take that branch? maybe reuse lowfreq_avail?
Maybe compute_clocks() could check i915_powersave itself and set
has_reduced_clock (or use_reduced_clock) correctly.
> - intel_crtc->lowfreq_avail = true;
> - } else {
> + else
> I915_WRITE(PCH_FP1(pll->id), fp);
> - }
> }
>
> intel_set_pipe_timings(intel_crtc);
> --
> 1.7.11.7
>
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