From: Radhakrishna Sripada <[email protected]> dgfx platforms do not support CPU fence and FBC host tracking so lets avoid write to removed registers.
Cc: Rodrigo Vivi <[email protected]> Cc: Matt Roper <[email protected]> Cc: Dhinakaran Pandiyan <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> --- drivers/gpu/drm/i915/display/intel_fbc.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 1f0d24a1dec1..12900b8ce28e 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -314,7 +314,12 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) break; } - if (params->fence_id >= 0) { + if (IS_DGFX(dev_priv)) { + /* + * dGFX GPUs don't have apperture or fences and only rely on FBC + * render nuke to track frontbuffer modifications + */ + } else if (params->fence_id >= 0) { dpfc_ctl |= IVB_DPFC_CTL_FENCE_EN; intel_de_write(dev_priv, SNB_DPFC_CTL_SA, SNB_CPU_FENCE_ENABLE | params->fence_id); -- 2.25.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
