On Wed, Jun 05, 2013 at 06:05:51PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <[email protected]>
>
> So add a power domain and check for it before we try to read
> VGA_CONTROL.
>
> This fixes unclaimed register messages that happen on suspend/resume.
>
> Signed-off-by: Paulo Zanoni <[email protected]>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 1 +
> 3 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 46b1f70..d51ce13 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -89,6 +89,7 @@ enum port {
> #define port_name(p) ((p) + 'A')
>
> enum intel_display_power_domain {
> + POWER_DOMAIN_VGA,
> POWER_DOMAIN_PIPE_A,
> POWER_DOMAIN_PIPE_B,
> POWER_DOMAIN_PIPE_C,
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 4c8fcec..3719d99 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9950,6 +9950,9 @@ void i915_redisable_vga(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> u32 vga_reg = i915_vgacntrl_reg(dev);
>
> + if (!intel_display_power_enabled(dev, POWER_DOMAIN_VGA))
> + return;
> +
So it looks like you're essentially making intel_redisable_vga() a nop
for HSW. Shouldn't we instead enable the power well during resume?
> if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
> DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
> i915_disable_vga(dev);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 50fe3d7..47ef4a6 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5000,6 +5000,7 @@ bool intel_display_power_enabled(struct drm_device *dev,
> case POWER_DOMAIN_PIPE_A:
> case POWER_DOMAIN_TRANSCODER_EDP:
> return true;
> + case POWER_DOMAIN_VGA:
> case POWER_DOMAIN_PIPE_B:
> case POWER_DOMAIN_PIPE_C:
> case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
> --
> 1.8.1.2
>
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--
Ville Syrjälä
Intel OTC
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