On Thu, Nov 07, 2019 at 01:45:58PM -0800, Jose Souza wrote:
Adding pipe D support to DSI transcoder.
Not adding it for EDP transcoder code paths as only TGL has 4 pipes
and it do not have a EDP transcoder.

Cc: Lucas De Marchi <[email protected]>
Signed-off-by: José Roberto de Souza <[email protected]>

Reviewed-by: Lucas De Marchi <[email protected]>

Lucas De Marchi

---
drivers/gpu/drm/i915/display/icl_dsi.c | 6 ++++++
drivers/gpu/drm/i915/i915_reg.h        | 1 +
2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 8eb2d7f29c82..f688207932e0 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -745,6 +745,9 @@ gen11_dsi_configure_transcoder(struct intel_encoder 
*encoder,
                case PIPE_C:
                        tmp |= TRANS_DDI_EDP_INPUT_C_ONOFF;
                        break;
+               case PIPE_D:
+                       tmp |= TRANS_DDI_EDP_INPUT_D_ONOFF;
+                       break;
                }

                /* enable DDI buffer */
@@ -1325,6 +1328,9 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder 
*encoder,
                case TRANS_DDI_EDP_INPUT_C_ONOFF:
                        *pipe = PIPE_C;
                        break;
+               case TRANS_DDI_EDP_INPUT_D_ONOFF:
+                       *pipe = PIPE_D;
+                       break;
                default:
                        DRM_ERROR("Invalid PIPE input\n");
                        goto out;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 70459a3d93e3..88d1430a6800 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9665,6 +9665,7 @@ enum skl_power_gate {
#define  TRANS_DDI_EDP_INPUT_A_ONOFF    (4 << 12)
#define  TRANS_DDI_EDP_INPUT_B_ONOFF    (5 << 12)
#define  TRANS_DDI_EDP_INPUT_C_ONOFF    (6 << 12)
+#define  TRANS_DDI_EDP_INPUT_D_ONOFF   (7 << 12)
#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK    REG_GENMASK(11, 10)
#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)  \
        REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, trans)
--
2.24.0

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