Hi Lionel, Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next] [cannot apply to v5.3-rc7 next-20190904] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lionel-Landwerlin/drm-i915-Vulkan-performance-query-support/20190907-052009 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-b001-201935 (attached as .config) compiler: gcc-7 (Debian 7.4.0-11) 7.4.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 If you fix the issue, kindly add following tag Reported-by: kbuild test robot <[email protected]> All errors (new ones prefixed by >>): In file included from <command-line>:0:0: drivers/gpu/drm/i915/i915_perf_types.h:25:2: error: unknown type name 'i915_reg_t' i915_reg_t addr; ^~~~~~~~~~ drivers/gpu/drm/i915/i915_perf_types.h:32:12: error: 'UUID_STRING_LEN' undeclared here (not in a function); did you mean '_LINUX_STRING_H_'? char uuid[UUID_STRING_LEN + 1]; ^~~~~~~~~~~~~~~ _LINUX_STRING_H_ drivers/gpu/drm/i915/i915_perf_types.h:75:6: error: unknown type name 'poll_table'; did you mean 'poll_to_key'? poll_table *wait); ^~~~~~~~~~ poll_to_key drivers/gpu/drm/i915/i915_perf_types.h:128:2: error: unknown type name 'intel_wakeref_t' intel_wakeref_t wakeref; ^~~~~~~~~~~~~~~ >> drivers/gpu/drm/i915/i915_perf_types.h:188:29: error: field >> 'active_config_rq' has incomplete type struct i915_active_request active_config_rq; ^~~~~~~~~~~~~~~~ vim +/active_config_rq +188 drivers/gpu/drm/i915/i915_perf_types.h 50 51 /** 52 * struct i915_perf_stream_ops - the OPs to support a specific stream type 53 */ 54 struct i915_perf_stream_ops { 55 /** 56 * @enable: Enables the collection of HW samples, either in response to 57 * `I915_PERF_IOCTL_ENABLE` or implicitly called when stream is opened 58 * without `I915_PERF_FLAG_DISABLED`. 59 */ 60 void (*enable)(struct i915_perf_stream *stream); 61 62 /** 63 * @disable: Disables the collection of HW samples, either in response 64 * to `I915_PERF_IOCTL_DISABLE` or implicitly called before destroying 65 * the stream. 66 */ 67 void (*disable)(struct i915_perf_stream *stream); 68 69 /** 70 * @poll_wait: Call poll_wait, passing a wait queue that will be woken 71 * once there is something ready to read() for the stream 72 */ 73 void (*poll_wait)(struct i915_perf_stream *stream, 74 struct file *file, > 75 poll_table *wait); 76 77 /** 78 * @wait_unlocked: For handling a blocking read, wait until there is 79 * something to ready to read() for the stream. E.g. wait on the same 80 * wait queue that would be passed to poll_wait(). 81 */ 82 int (*wait_unlocked)(struct i915_perf_stream *stream); 83 84 /** 85 * @read: Copy buffered metrics as records to userspace 86 * **buf**: the userspace, destination buffer 87 * **count**: the number of bytes to copy, requested by userspace 88 * **offset**: zero at the start of the read, updated as the read 89 * proceeds, it represents how many bytes have been copied so far and 90 * the buffer offset for copying the next record. 91 * 92 * Copy as many buffered i915 perf samples and records for this stream 93 * to userspace as will fit in the given buffer. 94 * 95 * Only write complete records; returning -%ENOSPC if there isn't room 96 * for a complete record. 97 * 98 * Return any error condition that results in a short read such as 99 * -%ENOSPC or -%EFAULT, even though these may be squashed before 100 * returning to userspace. 101 */ 102 int (*read)(struct i915_perf_stream *stream, 103 char __user *buf, 104 size_t count, 105 size_t *offset); 106 107 /** 108 * @destroy: Cleanup any stream specific resources. 109 * 110 * The stream will always be disabled before this is called. 111 */ 112 void (*destroy)(struct i915_perf_stream *stream); 113 }; 114 115 /** 116 * struct i915_perf_stream - state for a single open stream FD 117 */ 118 struct i915_perf_stream { 119 /** 120 * @dev_priv: i915 drm device 121 */ 122 struct drm_i915_private *dev_priv; 123 124 /** 125 * @wakeref: As we keep the device awake while the perf stream is 126 * active, we track our runtime pm reference for later release. 127 */ 128 intel_wakeref_t wakeref; 129 130 /** 131 * @engine: Engine associated with this performance stream. 132 */ 133 struct intel_engine_cs *engine; 134 135 /** 136 * @sample_flags: Flags representing the `DRM_I915_PERF_PROP_SAMPLE_*` 137 * properties given when opening a stream, representing the contents 138 * of a single sample as read() by userspace. 139 */ 140 u32 sample_flags; 141 142 /** 143 * @sample_size: Considering the configured contents of a sample 144 * combined with the required header size, this is the total size 145 * of a single sample record. 146 */ 147 int sample_size; 148 149 /** 150 * @ctx: %NULL if measuring system-wide across all contexts or a 151 * specific context that is being monitored. 152 */ 153 struct i915_gem_context *ctx; 154 155 /** 156 * @enabled: Whether the stream is currently enabled, considering 157 * whether the stream was opened in a disabled state and based 158 * on `I915_PERF_IOCTL_ENABLE` and `I915_PERF_IOCTL_DISABLE` calls. 159 */ 160 bool enabled; 161 162 /** 163 * @ops: The callbacks providing the implementation of this specific 164 * type of configured stream. 165 */ 166 const struct i915_perf_stream_ops *ops; 167 168 /** 169 * @active_config_mutex: Protects access to @active_config_rq, 170 * @oa_config & @oa_config_bos. 171 */ 172 struct mutex config_mutex; 173 174 /** 175 * @oa_config: The OA configuration used by the stream. 176 */ 177 struct i915_oa_config *oa_config; 178 179 /** 180 * @oa_config_bos: A list of struct i915_oa_config_bo allocated lazily 181 * each time @oa_config changes. 182 */ 183 struct list_head oa_config_bos; 184 185 /** 186 * @active_config_rq: Last request reconfiguring the HW. 187 */ > 188 struct i915_active_request active_config_rq; 189 190 /** 191 * @initial_oa_config_bo: First OA configuration BO to be run. 192 */ 193 struct drm_i915_gem_object *initial_oa_config_bo; 194 195 /** 196 * The OA context specific information. 197 */ 198 struct intel_context *pinned_ctx; 199 u32 specific_ctx_id; 200 u32 specific_ctx_id_mask; 201 202 struct hrtimer poll_check_timer; 203 wait_queue_head_t poll_wq; 204 bool pollin; 205 206 bool periodic; 207 int period_exponent; 208 209 /** 210 * State of the OA buffer. 211 */ 212 struct { 213 struct i915_vma *vma; 214 u8 *vaddr; 215 u32 last_ctx_id; 216 int format; 217 int format_size; 218 int size_exponent; 219 220 /** 221 * Locks reads and writes to all head/tail state 222 * 223 * Consider: the head and tail pointer state needs to be read 224 * consistently from a hrtimer callback (atomic context) and 225 * read() fop (user context) with tail pointer updates happening 226 * in atomic context and head updates in user context and the 227 * (unlikely) possibility of read() errors needing to reset all 228 * head/tail state. 229 * 230 * Note: Contention/performance aren't currently a significant 231 * concern here considering the relatively low frequency of 232 * hrtimer callbacks (5ms period) and that reads typically only 233 * happen in response to a hrtimer event and likely complete 234 * before the next callback. 235 * 236 * Note: This lock is not held *while* reading and copying data 237 * to userspace so the value of head observed in htrimer 238 * callbacks won't represent any partial consumption of data. 239 */ 240 spinlock_t ptr_lock; 241 242 /** 243 * One 'aging' tail pointer and one 'aged' tail pointer ready to 244 * used for reading. 245 * 246 * Initial values of 0xffffffff are invalid and imply that an 247 * update is required (and should be ignored by an attempted 248 * read) 249 */ 250 struct { 251 u32 offset; 252 } tails[2]; 253 254 /** 255 * Index for the aged tail ready to read() data up to. 256 */ 257 unsigned int aged_tail_idx; 258 259 /** 260 * A monotonic timestamp for when the current aging tail pointer 261 * was read; used to determine when it is old enough to trust. 262 */ 263 u64 aging_timestamp; 264 265 /** 266 * Although we can always read back the head pointer register, 267 * we prefer to avoid trusting the HW state, just to avoid any 268 * risk that some hardware condition could * somehow bump the 269 * head pointer unpredictably and cause us to forward the wrong 270 * OA buffer data to userspace. 271 */ 272 u32 head; 273 } oa_buffer; 274 275 /** 276 * A batch buffer doing a wait on the GPU for the NOA logic to be 277 * reprogrammed. 278 */ 279 struct i915_vma *noa_wait; 280 }; 281 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
_______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
