>-----Original Message----- >From: Sharma, Swati2 >Sent: Monday, August 26, 2019 11:56 AM >To: [email protected] >Cc: Nikula, Jani <[email protected]>; Sharma, Shashank ><[email protected]>; Manna, Animesh <[email protected]>; >Nautiyal, Ankit K <[email protected]>; [email protected]; >[email protected]; Shankar, Uma <[email protected]>; Sharma, >Swati2 <[email protected]> >Subject: [v8][PATCH 06/10] drm/i91/display: Extract i965_read_luts()
Typo in i915. > >For i965, have hw read out to create hw blob of gamma lut values. Instead of "have", I feel "add" would sound better. Also, don't drop version history. >Signed-off-by: Swati Sharma <[email protected]> >--- > drivers/gpu/drm/i915/display/intel_color.c | 39 ++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > 2 files changed, 42 insertions(+) > >diff --git a/drivers/gpu/drm/i915/display/intel_color.c >b/drivers/gpu/drm/i915/display/intel_color.c >index 45e0ee8..c77bbed 100644 >--- a/drivers/gpu/drm/i915/display/intel_color.c >+++ b/drivers/gpu/drm/i915/display/intel_color.c >@@ -1571,6 +1571,44 @@ void i9xx_read_luts(struct intel_crtc_state *crtc_state) > crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state); } > >+static struct drm_property_blob * >+i965_read_gamma_lut_10p6(struct intel_crtc_state *crtc_state) { You can rename this as " i965_read_lut_10p6" as pointed by Ville as well. Will help extend for de-gamma later and can be re-used. Also make these const, as recommended by Ville. >+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); >+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); >+ u32 i, val1, val2, lut_size = >INTEL_INFO(dev_priv)->color.gamma_lut_size; Move to next line to honour 80 character limits. >+ enum pipe pipe = crtc->pipe; >+ struct drm_property_blob *blob; >+ struct drm_color_lut *blob_data; >+ >+ blob = drm_property_create_blob(&dev_priv->drm, >+ sizeof(struct drm_color_lut) * lut_size, >+ NULL); >+ if (IS_ERR(blob)) >+ return NULL; >+ >+ blob_data = blob->data; >+ >+ for (i = 0; i < lut_size - 1; i++) { >+ val1 = I915_READ(PALETTE(pipe, 2 * i + 0)); >+ val2 = I915_READ(PALETTE(pipe, 2 * i + 1)); >+ >+ blob_data[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val1) << 8 | >REG_FIELD_GET(PALETTE_RED_MASK, val2); >+ blob_data[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val1) ><< 8 | REG_FIELD_GET(PALETTE_GREEN_MASK, val2); >+ blob_data[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val1) << 8 >| REG_FIELD_GET(PALETTE_BLUE_MASK, val2) ; >+ } >+ >+ return blob; >+} >+ >+static void i965_read_luts(struct intel_crtc_state *crtc_state) { >+ if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT) >+ crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state); >+ else >+ crtc_state->base.gamma_lut = >i965_read_gamma_lut_10p6(crtc_state); >+} >+ > void intel_color_init(struct intel_crtc *crtc) { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -1586,6 >+1624,7 @@ void intel_color_init(struct intel_crtc *crtc) > } else if (INTEL_GEN(dev_priv) >= 4) { > dev_priv->display.color_check = i9xx_color_check; > dev_priv->display.color_commit = i9xx_color_commit; >+ dev_priv->display.read_luts = i965_read_luts; > dev_priv->display.load_luts = i965_load_luts; > } else { > dev_priv->display.color_check = i9xx_color_check; diff > --git >a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index >b687faa..b30b0c6b 100644 >--- a/drivers/gpu/drm/i915/i915_reg.h >+++ b/drivers/gpu/drm/i915/i915_reg.h >@@ -3558,6 +3558,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) > #define _PALETTE_A 0xa000 > #define _PALETTE_B 0xa800 > #define _CHV_PALETTE_C 0xc000 >+#define PALETTE_RED_MASK REG_GENMASK(23, 16) >+#define PALETTE_GREEN_MASK REG_GENMASK(15, 8) >+#define PALETTE_BLUE_MASK REG_GENMASK(7, 0) > #define PALETTE(pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + \ > _PICK((pipe), _PALETTE_A, \ > _PALETTE_B, _CHV_PALETTE_C) + \ >-- >1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
