On Sat, Aug 17, 2019 at 02:38:25AM -0700, Lucas De Marchi wrote:
> From: José Roberto de Souza <[email protected]>
> 
> When trying to read registers from transcoder C and D while PG3 is ON it
> causes unclaimed access warnings. Adding the powerwells for the pipes
> fixes the issue, but doesn't match the spec.

This would need a BSpec ticket at Index/49231, but makes sense since the
only way these transcoders can be used is if their corresponding pipe is
already on (so can't see a point in keeping the transcoders in a
different power well than their pipes):

Reviewed-by: Imre Deak <[email protected]>

> 
> Signed-off-by: José Roberto de Souza <[email protected]>
> Signed-off-by: Lucas De Marchi <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 02f8c3911c59..48505c4b6d50 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -2544,12 +2544,14 @@ void intel_display_power_put(struct drm_i915_private 
> *dev_priv,
>  
>  #define TGL_PW_5_POWER_DOMAINS (                     \
>       BIT_ULL(POWER_DOMAIN_PIPE_D) |                  \
> +     BIT_ULL(POWER_DOMAIN_TRANSCODER_D) |            \
>       BIT_ULL(POWER_DOMAIN_PIPE_D_PANEL_FITTER) |     \
>       BIT_ULL(POWER_DOMAIN_INIT))
>  
>  #define TGL_PW_4_POWER_DOMAINS (                     \
>       TGL_PW_5_POWER_DOMAINS |                        \
>       BIT_ULL(POWER_DOMAIN_PIPE_C) |                  \
> +     BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |            \
>       BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) |     \
>       BIT_ULL(POWER_DOMAIN_INIT))
>  
> @@ -2557,8 +2559,6 @@ void intel_display_power_put(struct drm_i915_private 
> *dev_priv,
>       TGL_PW_4_POWER_DOMAINS |                        \
>       BIT_ULL(POWER_DOMAIN_PIPE_B) |                  \
>       BIT_ULL(POWER_DOMAIN_TRANSCODER_B) |            \
> -     BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |            \
> -     BIT_ULL(POWER_DOMAIN_TRANSCODER_D) |            \
>       BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) |     \
>       BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_LANES) |      \
>       BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_LANES) |      \
> -- 
> 2.21.0
> 
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