From: José Roberto de Souza <[email protected]> From BDW+ the PSR registers moved from DDIA to transcoder, so any port with a eDP panel connected can have PSR, so lets remove this limitation.
Cc: Dhinakaran Pandiyan <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> --- drivers/gpu/drm/i915/display/intel_psr.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 36bdc16fb43b..6eedd8281e72 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -578,11 +578,10 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, /* * HSW spec explicitly says PSR is tied to port A. - * BDW+ platforms have a instance of PSR registers per transcoder but - * for now it only supports one instance of PSR, so lets keep it - * hardcoded to PORT_A + * BDW+ platforms with DDI implementation of PSR have different + * PSR registers per transcoder. */ - if (dig_port->base.port != PORT_A) { + if (IS_HASWELL(dev_priv) && dig_port->base.port != PORT_A) { DRM_DEBUG_KMS("PSR condition failed: Port not supported\n"); return; } -- 2.21.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
