Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use range checks. Prepare for having other frequencies in these ranges by not comparing the exact frequency.
Signed-off-by: Lucas De Marchi <[email protected]> --- drivers/gpu/drm/i915/intel_cdclk.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index 6988c6cbc362..b175a2926caf 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -1865,21 +1865,18 @@ static void icl_set_cdclk(struct drm_i915_private *dev_priv, static u8 icl_calc_voltage_level(int cdclk) { - switch (cdclk) { - case 50000: - case 307200: - case 312000: + if (cdclk <= 312000) return 0; - case 556800: - case 552000: + + if (cdclk <= 556800) return 1; - default: - MISSING_CASE(cdclk); - /* fall through */ - case 652800: - case 648000: + + if (cdclk <= 652800) return 2; - } + + MISSING_CASE(cdclk); + + return 2; } static void icl_get_cdclk(struct drm_i915_private *dev_priv, -- 2.21.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
