== Series Details ==
Series: Enable/disable gamma/csc dynamically and fix C8 (rev2)
URL : https://patchwork.freedesktop.org/series/55081/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9cdee3f9e7a4 drm/i915: Split the gamma/csc enable bits from the plane_ctl()
function
0fd667c43e7a drm/i915: Precompute gamma_mode
c8911d530e36 drm/i915: Constify the state arguments to the color management
stuff
d6d5f9a92dd0 drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()
19b423bb1346 drm/i915: Split color mgmt based on single vs. double buffered
registers
a03988b0bb93 drm/i915: Move LUT programming to happen after vblank waits
b6745ce0a618 drm/i915: Populate gamma_mode for all platforms
-:33: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#33: FILE: drivers/gpu/drm/i915/i915_reg.h:5600:
+#define PIPECONF_GAMMA_MODE(x) ((x)<<24) /* pass in GAMMA_MODE_MODE_*
*/
^
total: 0 errors, 0 warnings, 1 checks, 146 lines checked
48b22ec5be11 drm/i915: Track pipe gamma enable/disable in crtc state
05d03c26af9b drm/i915: Track pipe csc enable in crtc state
ce89cf314d8c drm/i915: Turn off pipe gamma when it's not needed
e803ec9dc66b drm/i915: Turn off pipe CSC when it's not needed
29f28a57e210 drm/i915: Disable pipe gamma when C8 pixel format is used
9e2c3db18ed4 drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable()
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