GVTg implemented shared_page setup operation and read_shared_page functionality based on hypervisor_read_gpa().
the shared_page_gpa was passed from guest driver through PVINFO shared_page_gpa register. v0: RFC v1: rebase v2: rebase v3: added shared_page_gpa check and if read_gpa failure, return zero memory and handle VGT_G2V_SHARED_PAGE_SETUP g2v notification Cc: Zhenyu Wang <[email protected]> Cc: Zhi Wang <[email protected]> Cc: Min He <[email protected]> Cc: Fei Jiang <[email protected]> Cc: Zhipeng Gong <[email protected]> Cc: Hang Yuan <[email protected]> Cc: Zhiyuan Lv <[email protected]> Signed-off-by: Xiaolin Zhang <[email protected]> --- drivers/gpu/drm/i915/gvt/gvt.h | 5 ++++- drivers/gpu/drm/i915/gvt/handlers.c | 39 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/gvt/vgpu.c | 24 +++++++++++++++++++++++ 3 files changed, 67 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 5f6b2d5..e013962 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -235,6 +235,8 @@ struct intel_vgpu { struct completion vblank_done; u32 scan_nonprivbb; + u64 shared_page_gpa; + bool shared_page_enabled; }; /* validating GM healthy status*/ @@ -693,7 +695,8 @@ int intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu); void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu); int intel_gvt_debugfs_init(struct intel_gvt *gvt); void intel_gvt_debugfs_clean(struct intel_gvt *gvt); - +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len); #include "trace.h" #include "mpt.h" diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 6cb139f..16ef41b 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1166,6 +1166,8 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, case 0x78010: /* vgt_caps */ case 0x7881c: case _vgtif_reg(pvmmio_caps): + case _vgtif_reg(shared_page_gpa.lo): + case _vgtif_reg(shared_page_gpa.hi): break; default: invalid_read = true; @@ -1183,6 +1185,7 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) intel_gvt_gtt_type_t root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY; struct intel_vgpu_mm *mm; u64 *pdps; + unsigned long gfn; pdps = (u64 *)&vgpu_vreg64_t(vgpu, vgtif_reg(pdp[0])); @@ -1196,6 +1199,11 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) case VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY: case VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY: return intel_vgpu_put_ppgtt_mm(vgpu, pdps); + case VGT_G2V_SHARED_PAGE_SETUP: + gfn = vgpu->shared_page_gpa >> PAGE_SHIFT; + if (intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) + vgpu->shared_page_enabled = true; + break; case VGT_G2V_EXECLIST_CONTEXT_CREATE: case VGT_G2V_EXECLIST_CONTEXT_DESTROY: case 1: /* Remove this in guest driver. */ @@ -1223,6 +1231,33 @@ static int send_display_ready_uevent(struct intel_vgpu *vgpu, int ready) return kobject_uevent_env(kobj, KOBJ_ADD, env); } +static int handle_shared_page_gpa(struct intel_vgpu *vgpu, + unsigned int offset, unsigned int data) +{ + bool partial_update = false; + unsigned long gpa, gfn; + + if (offset == _vgtif_reg(shared_page_gpa.lo)) { + if (vgpu_vreg_t(vgpu, vgtif_reg(shared_page_gpa.hi)) == -1U) + partial_update = true; + } + if (offset == _vgtif_reg(shared_page_gpa.hi)) { + if (vgpu_vreg_t(vgpu, vgtif_reg(shared_page_gpa.lo)) == -1U) + partial_update = true; + } + if (partial_update) + return 0; + + gpa = vgpu_vreg64_t(vgpu, vgtif_reg(shared_page_gpa)); + gfn = gpa >> PAGE_SHIFT; + if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) { + vgpu_vreg_t(vgpu, vgtif_reg(pvmmio_caps)) = 0; + return 0; + } + vgpu->shared_page_gpa = gpa; + return 0; +} + static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) { @@ -1242,6 +1277,10 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, case _vgtif_reg(pvmmio_caps): DRM_INFO("vgpu id=%d pvmmio caps =0x%x\n", vgpu->id, data); break; + case _vgtif_reg(shared_page_gpa.lo): + case _vgtif_reg(shared_page_gpa.hi): + handle_shared_page_gpa(vgpu, offset, data); + break; /* add xhot and yhot to handled list to avoid error log */ case _vgtif_reg(cursor_x_hot): case _vgtif_reg(cursor_y_hot): diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 84244ab..40aaae8 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -63,6 +63,8 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX; vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX; + vgpu_vreg_t(vgpu, vgtif_reg(shared_page_gpa.lo)) = -1U; + vgpu_vreg_t(vgpu, vgtif_reg(shared_page_gpa.hi)) = -1U; gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n", @@ -587,3 +589,25 @@ void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu) intel_gvt_reset_vgpu_locked(vgpu, true, 0); mutex_unlock(&vgpu->vgpu_lock); } + +/** + * intel_gvt_read_shared_page - read content from shared page + */ +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len) +{ + int ret = -EINVAL; + unsigned long gpa; + + if (offset >= sizeof(struct gvt_shared_page)) + goto err; + + gpa = vgpu->shared_page_gpa + offset; + ret = intel_gvt_hypervisor_read_gpa(vgpu, gpa, buf, len); + if (!ret) + return ret; +err: + gvt_vgpu_err("read shared page (offset %x) failed", offset); + memset(buf, 0, len); + return ret; +} -- 2.7.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
