From: Ville Syrjälä <[email protected]> We memset(0) the entire watermark struct the start, so there's no need to clear things later on.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/intel_pm.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bd5f16bc7e08..b0720994fa0a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4706,10 +4706,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, if (latency == 0) return level == 0 ? -EINVAL : 0; - if (!intel_wm_plane_visible(cstate, intel_pstate)) { - result->plane_en = false; + if (!intel_wm_plane_visible(cstate, intel_pstate)) return 0; - } /* Display WA #1141: kbl,cfl */ if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || @@ -4806,8 +4804,6 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, if ((level > 0 && res_lines > 31) || res_blocks >= ddb_allocation || min_disp_buf_needed >= ddb_allocation) { - result->plane_en = false; - /* * If there are no valid level 0 watermarks, then we can't * support this display configuration. @@ -4831,10 +4827,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, */ if (wp->is_planar && level >= 1 && (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) || - IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) { - result->plane_en = false; + IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) return 0; - } /* The number of lines are ignored for the level 0 watermark. */ result->plane_res_b = res_blocks; @@ -4920,15 +4914,15 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate, uint16_t wm0_sel_res_b, trans_offset_b, res_blocks; if (!cstate->base.active) - goto exit; + return; /* Transition WM are not recommended by HW team for GEN9 */ if (INTEL_GEN(dev_priv) <= 9) - goto exit; + return; /* Transition WM don't make any sense if ipc is disabled */ if (!dev_priv->ipc_enabled) - goto exit; + return; trans_min = 14; if (INTEL_GEN(dev_priv) >= 11) @@ -4967,11 +4961,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate, if (res_blocks < ddb_allocation) { trans_wm->plane_res_b = res_blocks; trans_wm->plane_en = true; - return; } - -exit: - trans_wm->plane_en = false; } static int __skl_build_plane_wm_single(struct skl_ddb_allocation *ddb, -- 2.18.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
