Now that we reload both RING_HEAD and RING_TAIL when rebinding the context, we do not need to scrub those registers immediately on resume.
v2: Handle the perma-pinned contexts. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Mika Kuoppala <[email protected]> --- drivers/gpu/drm/i915/intel_lrc.c | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 881ab979f02f..5dd12b0fc998 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2861,13 +2861,14 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, return ret; } -void intel_lr_context_resume(struct drm_i915_private *dev_priv) +void intel_lr_context_resume(struct drm_i915_private *i915) { struct intel_engine_cs *engine; struct i915_gem_context *ctx; enum intel_engine_id id; - /* Because we emit WA_TAIL_DWORDS there may be a disparity + /* + * Because we emit WA_TAIL_DWORDS there may be a disparity * between our bookkeeping in ce->ring->head and ce->ring->tail and * that stored in context. As we only write new commands from * ce->ring->tail onwards, everything before that is junk. If the GPU @@ -2877,28 +2878,20 @@ void intel_lr_context_resume(struct drm_i915_private *dev_priv) * So to avoid that we reset the context images upon resume. For * simplicity, we just zero everything out. */ - list_for_each_entry(ctx, &dev_priv->contexts.list, link) { - for_each_engine(engine, dev_priv, id) { + list_for_each_entry(ctx, &i915->contexts.list, link) { + for_each_engine(engine, i915, id) { struct intel_context *ce = to_intel_context(ctx, engine); - u32 *reg; - - if (!ce->state) - continue; - reg = i915_gem_object_pin_map(ce->state->obj, - I915_MAP_WB); - if (WARN_ON(IS_ERR(reg))) + if (!ce->ring) continue; - reg += LRC_STATE_PN * PAGE_SIZE / sizeof(*reg); - reg[CTX_RING_HEAD+1] = 0; - reg[CTX_RING_TAIL+1] = 0; - - ce->state->obj->mm.dirty = true; - i915_gem_object_unpin_map(ce->state->obj); - intel_ring_reset(ce->ring, 0); + + if (ce->pin_count) { /* otherwise done in context_pin */ + ce->lrc_reg_state[CTX_RING_HEAD + 1] = 0; + ce->lrc_reg_state[CTX_RING_TAIL + 1] = 0; + } } } } -- 2.19.0.rc2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
