Ensure that our power domain wakerefs are balanced across initialisation, so that we do not leak the powerwells on error or if the display is disabled.
Signed-off-by: Chris Wilson <[email protected]> --- drivers/gpu/drm/i915/i915_drv.c | 4 ++++ drivers/gpu/drm/i915/intel_display.c | 7 ++++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 9dce55182c3a..e4373273ceda 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -689,6 +689,9 @@ static int i915_load_modeset_init(struct drm_device *dev) intel_setup_overlay(dev_priv); + intel_display_set_init_power(dev_priv, false); + intel_power_domains_verify_state(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes == 0) return 0; @@ -1775,6 +1778,7 @@ static int i915_drm_resume(struct drm_device *dev) intel_opregion_notify_adapter(dev_priv, PCI_D0); + intel_display_set_init_power(dev_priv, false); enable_rpm_wakeref_asserts(dev_priv); return 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dbf3d80353b1..1386387e0e91 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15846,6 +15846,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev, struct intel_encoder *encoder; int i; + intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); + intel_early_display_was(dev_priv); intel_modeset_readout_hw_state(dev); @@ -15900,11 +15902,10 @@ intel_modeset_setup_hw_state(struct drm_device *dev, if (WARN_ON(put_domains)) modeset_put_power_domains(dev_priv, put_domains); } - intel_display_set_init_power(dev_priv, false); - - intel_power_domains_verify_state(dev_priv); intel_fbc_init_pipe_state(dev_priv); + + intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); } void intel_display_resume(struct drm_device *dev) -- 2.18.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
