On Fri, 2018-03-16 at 16:25 -0700, Rodrigo Vivi wrote:
> On Fri, Mar 16, 2018 at 04:04:58PM -0700, José Roberto de Souza wrote:
> > Move to only one place the sink requirements that the actual driver
> > needs to enable PSR2.
> >
> > Also intel_psr2_config_valid() is called every time the crtc config
> > is computed, wasting some time every time it was checking for
> > Y coordinate requirement.
> >
> > This allow us to nuke y_cord_support and some of VSC setup code that
> > was handling a scenario that would never happen(PSR2 without Y
> > coordinate).
> >
> > Cc: Dhinakaran Pandiyan <[email protected]>
> > Cc: Rodrigo Vivi <[email protected]>
> > Signed-off-by: José Roberto de Souza <[email protected]>
>
> Reviewed-by: Rodrigo Vivi <[email protected]>
>
> > ---
> >
> > v2: Changes in comment requested by Rodrigo Vivi
> >
> > drivers/gpu/drm/i915/i915_drv.h | 1 -
> > drivers/gpu/drm/i915/intel_psr.c | 56
> > +++++++++++++++++++++-------------------
> > 2 files changed, 29 insertions(+), 28 deletions(-)
> >
> >
> > @@ -586,14 +590,12 @@ static void hsw_psr_enable_source(struct intel_dp
> > *intel_dp,
> > struct drm_device *dev = dig_port->base.base.dev;
> > struct drm_i915_private *dev_priv = to_i915(dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 chicken;
> >
> > psr_aux_io_power_get(intel_dp);
> >
> > if (dev_priv->psr.psr2_support) {
> > - chicken = PSR2_VSC_ENABLE_PROG_HEADER;
> > - if (dev_priv->psr.y_cord_support)
> > - chicken |= PSR2_ADD_VERTICAL_LINE_COUNT;
> > + u32 chicken = PSR2_VSC_ENABLE_PROG_HEADER
> > + | PSR2_ADD_VERTICAL_LINE_COUNT;
I think I answered my own question.
Please check the bits on these register. Seems like these bits were
replaced by
PSR2_CTL[EDP_Y_COORDINATE_VALID | EDP_Y_COORDINATE_ENABLE] bits on gen10
If I am correct, this register should be set only for gen-9. It'd be
nice to fix PSR2 while making these changes :)
> > I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);
> >
> > I915_WRITE(EDP_PSR_DEBUG,
> > --
> > 2.16.2
> >
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