This was wrong since its introduction on commit '04416108ccea
("drm/i915/cnl: Add registers related to voltage swing sequences.")'

But since no Port F was needed so far we don't need to
propagate fixes back there.

Cc: Manasi Navare <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a72d18f5b31e..55295365f654 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1929,7 +1929,7 @@ enum i915_power_well_id {
 #define _CNL_PORT_TX_DW2_LN0_B         0x162648
 #define _CNL_PORT_TX_DW2_LN0_C         0x162C48
 #define _CNL_PORT_TX_DW2_LN0_D         0x162E48
-#define _CNL_PORT_TX_DW2_LN0_F         0x162A48
+#define _CNL_PORT_TX_DW2_LN0_F         0x162848
 #define CNL_PORT_TX_DW2_GRP(port)      _MMIO_PORT6(port, \
                                                    _CNL_PORT_TX_DW2_GRP_AE, \
                                                    _CNL_PORT_TX_DW2_GRP_B, \
-- 
2.13.5

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to