Chris Wilson <[email protected]> writes:

> Before modifying the ring register (RING_START, HEAD, TAIL, CTL) we
> first make sure it is stopped (or else the hw may not resample the
> registers). However, we do not need to let the hw restart until after we
> have reprogrammed all the rings. This should help prevent situations
> where pending operations on the ring may resume (because we are trying
> to re-initialize following an unsuccessful GPU hang, i.e. from
> i915_gem_unset_wedged).
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103260
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: Mika Kuoppala <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 4285f09ff8b8..b2a6cb09c6e7 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -484,11 +484,6 @@ static bool stop_ring(struct intel_engine_cs *engine)
>       I915_WRITE_HEAD(engine, 0);
>       I915_WRITE_TAIL(engine, 0);
>  
> -     if (INTEL_GEN(dev_priv) > 2) {
> -             (void)I915_READ_CTL(engine);
> -             I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
> -     }
> -
>       return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
>  }
>  
> @@ -570,6 +565,9 @@ static int init_ring_common(struct intel_engine_cs 
> *engine)
>  
>       intel_engine_init_hangcheck(engine);
>  
> +     if (INTEL_GEN(dev_priv) > 2)
> +             I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
> +

Make sense. Further work could be to introduce start_ring() helper.

Reviewed-by: Mika Kuoppala <[email protected]>

>  out:
>       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>  
> -- 
> 2.15.0.rc0
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to